18.7.8 DFLL48M Control A

Table 18-11. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Grey cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
KWrite to clearSSoftware settable bit
Name: DFLLCTRLA
Offset: 0x2C
Reset: 0x00000082
Property: PAC Write-Protection

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
 ONDEMAND   LOWFREQWRTLOCKENABLE  
Access R/WR/WR/WR/W 
Reset 1001 

Bit 7 – ONDEMAND On Demand Control

The ONDEMAND operation mode allows the DFLL to be enabled or disabled depending on peripheral clock requests.

Note: If ONDEMAND is set, the DFLL will only be running when requested by a peripheral and enabled (DFLLTRLA. ENABLE=1). If there is no peripheral requesting the DFLL’s clock source, the DFLL will be in a disabled state. If ONDEMAND is disabled the DFLL will always be running when enabled (DFLLTRLA.ENABLE=1). In standby sleep mode, the ONDEMAND operation is still active This bit is DFLLCTRLA.ENABLE protected and cannot be updated if DFLLCTRLA.ENABLE=1.
ValueDescription
0The DFLL is always on.
1The DFLL is running when a peripheral is requesting the DFLL to be used as a clock source. The DFLL is not running if no peripheral is requesting the clock source.

Bit 3 – LOWFREQ Low Frequency Mode

Note: This bit is DFLLCTRLA.ENABLE protected and cannot be updated if DFLLCTRLA.ENABLE=1.
ValueDescription
0The DFLL48M oscillator operates at high frequency.
1The DFLL48M oscillator operates at low frequency.

Bit 2 – WRTLOCK Write lock

Note: Once the WRTLOCK bit is set, it can only be cleared by a reset.
ValueDescription
0The DFLLCTRLA and DFLLCTRLB registers can be modified by a system write.
1The DFLLCTRLA and DFLLCTRLB registers are write protected.

Bit 1 – ENABLE DFLL48M Enable

Note: This bit is write-synchronized: Due to synchronization, there is delay from updating the register until the peripheral is enabled/disabled. The value written to DFLLCTRLA.ENABLE will read back immediately after written.
ValueDescription
0The DFLL48M oscillator is disabled.
1The DFLL48M oscillator is enabled.