18.7.10 DFLL Tune
Symbol | Description | Symbol | Description | Symbol | Description |
---|---|---|---|---|---|
R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
K | Write to clear | S | Software settable bit | — | — |
Name: | DFLLTUNE |
Offset: | 0x34 |
Reset: | 0x00000000 |
Property: | PACWrite-Protection, Write-Synchronized, Read-Synchronized |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
Access | |||||||||
Reset |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
Access | |||||||||
Reset |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
TUNE[6:0] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 6:0 – TUNE[6:0] DFLL48M Tune Value
Sets the value of the Tune Calibration register.
Note: In closed-loop mode, this field
is read-only.
Step | TUNE[6:0] | % Delta/step |
---|---|---|
+63 | 0b011 1111 | +9.45% |
••• | ••• | ••• |
+1 | 0b000 0001 | +0.15% |
0 | 0b000 0000 / 0b111 1111 | 0% |
-1 | 0b111 1110 | -0.15% |
••• | ••• | ••• |
-63 | 0b100 0000 | -9.45% |
Note:
- % Delta value is rounded to two decimal places.