30.10.1 MediaLB Control 0 Register
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | MLBC0 |
| Offset: | 0x400 |
| Reset: | 0x00000000 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| FCNT[2:1] | |||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 0 | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| FCNT[0] | CTLRETRY | ASYRETRY | |||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| MLBLK | MLBPEN | MLBCLK[2:0] | MLBEN | ||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | |||
Bits 17:15 – FCNT[2:0] The number of frames per sub-buffer for synchronous channels
| Value | Name | Description |
|---|---|---|
| 0 | 1_FRAME | 1 frame per sub-buffer (Operation is the same as Standard mode.) |
| 1 | 2_FRAMES | 2 frames per sub-buffer |
| 2 | 4_FRAMES | 4 frames per sub-buffer |
| 3 | 8_FRAMES | 8 frames per sub-buffer |
| 4 | 16_FRAMES | 16 frames per sub-buffer |
| 5 | 32_FRAMES | 32 frames per sub-buffer |
| 6 | 64_FRAMES | 64 frames per sub-buffer |
Bit 14 – CTLRETRY Control Tx Packet Retry
| Value | Description |
|---|---|
| 0 | A control packet that is flagged with a Break or ProtocolError by the receiver is skipped. |
| 1 | A control packet that is flagged with a Break or ProtocolError by the receiver is retransmitted. |
Bit 12 – ASYRETRY Asynchronous Tx Packet Retry
| Value | Description |
|---|---|
| 0 | An asynchronous packet that is flagged with a Break or ProtocolError by the receiver is skipped. |
| 1 | An asynchronous packet that is flagged with a Break or ProtocolError by the receiver is retransmitted. |
Bit 7 – MLBLK MediaLB Lock Status (read-only)
| Value | Description |
|---|---|
| 1 |
indicates that the MediaLB block is synchronized to the incoming MediaLB frame. If MLBLK is cleared (unlocked), MLBLK is set after FRAMESYNC is detected at the same position for three consecutive frames. If MLBLK is set (locked), MLBLK is cleared after not receiving FRAMESYNC at the expected time for two consecutive frames. While MLBLK is set, FRAMESYNC patterns occurring at locations other than the expected one are ignored. |
Bit 5 – MLBPEN MediaLB pin Enable
| Value | Description |
|---|---|
| 0 | MediaLB 3-pin enable |
| 1 | Reserved |
Bits 4:2 – MLBCLK[2:0] MLBCLK (MediaLB clock) Speed Select
| Value | Name | Description |
|---|---|---|
| 0 | 256_FS | 256xFs (for MLBPEN = 0) |
| 1 | 512_FS | 512xFs (for MLBPEN = 0) |
| 2 | 1024_FS | 1024xFs (for MLBPEN = 0) |
| 3 | 2048_FS | 2048xFs (for MLBPEN = 0) |
| 4 | 3072_FS | 3072xFs (for MLBPEN = 0) |
| 5 | 4096_FS | 4096xFs (for MLBPEN = 0) |
| 6 | 6144_FS | 6144xFs (for MLBPEN = 0) |
Bit 0 – MLBEN MediaLB Enable
| Value | Description |
|---|---|
| 1 | MLBCLK (MediaLB clock), MLBSIG (signal), and MLBDATA (data) are received and transmitted on the appropriate MediaLB pins. |