1.3.2.1 64b6xb Data Path Interface

An 64b6xb lane data path has the following interfaces:

  • Fabric interface – a data path interface with soft-logic
  • Internal clocks and resets interface
  • PMA interface
    • Parallel transmit data to the serializer
    • Parallel receive data from the de-serializer
  • Tx and Rx Fly-wheel FIFO(FWF)
  • 64b6xb Transmit Data Path Blocks, Fabric to PMA Order
  • 64b6xb Receive Data Path Blocks, PMA to Fabric Order
  • System registers interface – controlling modes and options

The following figure shows an overview of the 64b6xb data path within the 64b6xb lane. The diagram is intended to show the relative data and clock paths from the serial to fabric interface and vice-versa.

The fabric TX_DATA and RX_DATA ports are allocated to pin functions as described in 64B6xB Port List Table 1-10. In addition to the fabric data pins, there are additional signals described in 64B6xB portlist (Table 1-10) on the fabric interface for 64B6xB mode.

Table 1-7. 64b6xb Transmit Data Path Blocks, Fabric to PMA Order
Tx BlockPurpose
8B_to_4BOptionally compresses transmit bus width from 64-bits to 32-bits.
Tx ScramblerImplements IEEE 802.3 Clause 49 data scrambling. Same scrambling also specified for use in Interlaken.
Tx DisparityImplements inversion of 67-bit symbol. Only for use in Interlaken.
Tx GearboxOutputs continuous stream of 32-bits per clock beat to the PMA given an input consisting of 64-bit block symbols, which has cyclic gaps in its active clock beats. This block inserts the 2 or 3 bits of header on each block.
Tx Test GenOptionally replaces the output stream with PRBS or square-wave pattern (1111_0000).
Table 1-8. 64b6xb Receive Data Path Blocks, PMA to Fabric Order
Rx BlockPurpose
Rx GearboxLocates block boundaries (configurable to 66-bit or 67-bit) in continuous stream of 
32-bits data per clock beat from PMA. Removes the 2 or 3 bit headers and plays out the 64-bit data blocks in cyclic pattern of 32-bit clock beats with some inactive cycles.
Rx DisparityInverts block based on header bit used in Interlaken.
Rx De-scramblerImplements IEEE 802.3 Clause 49 data de-scrambling. Same de-scrambling also specified for use in Interlaken.
Rx 4B_to_8BOptionally widens the data path to 64-bits per clock beat.
Figure 1-16. 64b6xb Data Path