3.5.1.22.2 SoC Data Transfer Methods

There are three data transfer methods provided to transfer data between processor memory and HLS accelerators.

CPU Copy

The RISC-V CPU handles the data transfer between memory and the accelerator’s on-chip memory buffer. This transfer method is available for pointer arguments specified with the 3.6.1.15 AXI4 Target Interface for Pointer Argument (e.g., #pragma HLS interface argument(<ARGUMENT_NAME>) type(axi_target)). The memcpy_write and memcpy_read driver functions are used to initiate the CPU Copy transfers in and out of the accelerator’s on-chip memory buffer (see 3.5.1.19.3 Pointer Argument Driver Functions). The CPU copy method is used when the dma option of the AXI4 target interface pragma is unspecified or is set to false, where the 3.5.1.19.5 Top-level Driver Functions call the memcpy_write function for the RISC-V CPU to transfer argument data from processor memory to the accelerator’s on-chip memory buffer before the accelerator starts executing (if data is used as an input to the accelerator), and call the memcpy_read function for the RISC-V CPU to copy data from the accelerator’s on-chip memory buffer back to processor memory after accelerator finishes execution (if data is used as an output from the accelerator). If data is used as both input and output, both memcpy_read and memcpy_write are called (see 3.5.1.19.5.1 Top-level Driver Options in Pointer Arguments' AXI4 Target Interface Pragma).

DMA Copy

A DMA core transfers data between processor memory and accelerator’s on-chip memory buffer in bursts to achieve high bandwidth data transfer. As in the CPU Copy method, this transfer method is available for pointer arguments specified with the 3.6.1.15 AXI4 Target Interface for Pointer Argument and is used when the dma option is set to true (e.g., #pragma HLS interface argument(<ARGUMENT_NAME>) type(axi_target) dma(true)). The dma_write and dma_read driver functions are used to initiate DMA Copy transfers in and out of the accelerator’s on-chip memory buffer (see 3.5.1.19.3 Pointer Argument Driver Functions). When the DMA Copy method is used, the 3.5.1.19.5 Top-level Driver Functions call the dma_write and dma_read functions to copy data in and out of the accelerator’s on-chip memory buffer depending on the argument’s direction (also see 3.5.1.19.5.1 Top-level Driver Options in Pointer Arguments' AXI4 Target Interface Pragma).

Important:

For pointer arguments specified with AXI4 target interface pragma, both CPU and DMA Copy transfer methods can be used. The generated accelerator architecture is the same for both transfer methods, with the difference being the driver functions that are used to perform the data transfers. Users can call the appropriate driver functions or simply change the dma option in the interface pragma to configure the transfer method used by the 3.5.1.19.5 Top-level Driver Functions and no hardware recompilation would be required.

Accelerator Direct Access

This method can only be used when an AXI4 Initiator interface is specified for a pointer argument with the #pragma HLS interface argument(<ARGUMENT_NAME>) type(axi_initiator) pragma (see 3.6.1.16 AXI4 Initiator Interface for Pointer Argument ). In this case, the accelerator will directly access the processor memory This method has the advantage that no on-chip memory buffer is required in the accelerator as it accesses data directly without it being copied, resulting in lower on-chip memory usage. This method is recommended when data is not accessed frequently, as the latency for the accelerator to access processor memory will be higher than accessing accelerator’s on-chip memory buffer, and is not recommended when large amounts of data needs to be accessed.

As described above, the accelerator’s architecture will be different depending on which data transfer method is being used. Using CPU Copy and DMA Copy will result in on-chip memory buffer being created for AXI Target interface to store the copied data, and using Accelerator Direct Access will not create on-chip memory buffer for AXI Initiator interface.