3.5.1.8.3 Instrumentation Flows

While the auto-instrumentation tool can be used with the fully-automated Icicle Kit SoC flow, you can also call it in your own custom flow. For examples for both, refer to github.com/MicrochipTech/fpga-hls-examples/tree/main/auto-instrument.

Using Instrumentation in the SmartHLS SoC Flow

To enable SmartHLS Automatic On-Chip Instrumentation when using the SoC Flow:
  1. Run the following in the SmartHLS project directory:shls instrument_init. This will generate the instrument_conf.json file with all the default values but you can customize which modules get instrumented and to what extent. For more information, see Table 3-2.
  2. Add the following to the Makefile file in your SmartHLSproject directory: HLS_INSTRUMENT_ENABLE=1
  3. Generate the bit stream as usual using the following command: shls soc_accel_proj_pnr

    The generated bit stream will be instrumented and ready for debugging using SynpIify's Identify_debugger tool.

Using a Custom Instrumentation Flow

To use the SmartHLS Automatic On-Chip Instrumentation tool while using a custom flow:
  1. Run the following command from your SmartHLS project directory to generate the instrument_conf.json file which you can use to customize which modules get instrumented and to what extent: shls instrument_init
  2. Run synthesis on your design.
  3. After synthesis, run from the command-line, or from within a TCL script, the following command to generate the scripts required to instrument your design. These scripts will be stored under the hls_output/instrument/identify directory: 
    synplify_pro -batch [PATH TO
      SMARTHLS]/examples/scripts/utils/instrument/generate_identify_instrumentation_files.tcl [PATH
      TO YOUR SMARTHLS PROJECT] [PATH TO THE SYNTHESIS DIRECTORY OF YOUR
    PROJECT]
  4. Instrument the design by running the following command: 
    identify_instrumentor_shell  [PATH TO YOUR SMARTHLS
                          PROJECT]/hls_output/scripts/instrument/prj_[HLS
                          PROJECT_NAME]_hls_identify.tcl

User-defined instrumentation script

Users that have a custom, manual instrumentation script for other non-HLS signals (e.g. instrument a hand-written RTL module) can source any SmartHLS-generated instrumentation TCL command file in their custom instrumentation script as follows:
#
# my_custom_instrumentation_script.tcl
#
...
 
iice new {IICE} -type regular -mode {none}
iice sampler -iice {IICE} -depth 2048 -qualified_sampling 1 -always_armed 1 -compression 0 {behavioral}
iice clock -iice {IICE}  -edge positive {/path/to/my/axis_clk}
iice controller -iice {IICE}  none
 
#
# Instrumenting user custom signals here
#
signals add -iice {IICE} -sample -trigger {/MSS/FIC_0_DLL_LOCK_M2F}
signals add -iice {IICE} -sample -trigger {/MSS/GPIO_2_M2F_4}
signals add -iice {IICE} -sample -trigger {/MSS/GPIO_2_M2F_8}
 
#
# Source the automatically-generated HLS Identify script(s) here:
#
source  [PATH TO YOUR SMARTHLS PROJECT]/hls_output/scripts/instrument/[HLS PROJECT_NAME]_hls_identify.tcl
Then run the custom script using the Synplify's Identify_Instrumentor. For example:
identify_instrumentor_shell -licensetype identinstrumentor_actel
                          my_custom_instrumentation_script.tcl

You can verify that the instrumentation has run successfully by going to [SYNTHESIS DIRECTORY]/identify.idc, and checking that the signals you intend to instrument have been indeed instrumented.