2.3.4.2.1 Timing Characteristics

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Table 2-45. 2.5V LVCMOS High Slew Worst Military-Case Conditions: T_J = 125 °C, Worst-Case VCC = 1.425V, Worst-Case VCCxxxxIOBx = 2.3V Applicable to FPGA I/O Banks, I/O Assigned to EMC I/O Pins
Drive Strength	Speed Grade	t_DOUT	t_DP	t_DIN	t_PY	t_EOUT	t_ZL	t_ZH	t_LZ	t_HZ	t_ZLS	t_ZHS	Units
4 mA	Std.	0.57	8.67	0.04	1.32	0.41	7.89	8.67	2.72	2.32	10.09	10.87	ns
4 mA	–1	0.47	7.22	0.03	1.10	0.34	6.57	7.22	2.27	1.94	8.41	9.06	ns
8 mA	Std.	0.57	5.19	0.04	1.32	0.41	5.10	5.19	3.11	3.03	7.30	7.40	ns
8 mA	–1	0.47	4.33	0.03	1.10	0.34	4.25	4.33	2.59	2.52	6.09	6.16	ns
12 mA¹	Std.	0.62	3.64	0.04	1.32	0.41	3.71	3.46	3.37	3.47	5.91	5.66	ns
12 mA¹	–1	0.52	3.03	0.03	1.10	0.34	3.09	2.88	2.81	2.90	4.93	4.72	ns
16 mA	Std.	0.62	3.44	0.04	1.32	0.41	3.50	3.09	3.43	3.59	5.70	5.29	ns
16 mA	–1	0.52	2.86	0.03	1.10	0.34	2.92	2.57	2.85	2.99	4.75	4.41	ns
24 mA	Std.	0.62	3.16	0.04	1.32	0.41	3.22	2.48	3.50	4.03	5.43	4.68	ns
24 mA	–1	0.52	2.64	0.03	1.10	0.34	2.68	2.06	2.92	3.35	4.52	3.90	ns

Note:

Denotes the software default selection. This note is applicable for the entire row.
For specific junction temperature and voltage supply levels, refer to Table 2-7 for derating values.

Table 2-46. 2.5V LVCMOS Low Slew Worst Military-Case Conditions: T_J = 125 °C, Worst-Case VCC = 1.425V, Worst-Case VCCxxxxIOBx = 2.3V Applicable to FPGA I/O Banks, I/O Assigned to EMC I/O Pins
Drive Strength	Speed Grade	t_DOUT	t_DP	t_DIN	t_PY	t_EOUT	t_ZL	t_ZH	t_LZ	t_HZ	t_ZLS	t_ZHS	Units
4 mA	Std.	0.57	11.25	0.04	1.32	0.41	11.45	11.25	2.72	2.22	13.65	13.45	ns
4 mA	–1	0.47	9.37	0.03	1.10	0.34	9.54	9.37	2.27	1.85	11.37	11.21	ns
8 mA	Std.	0.57	8.15	0.04	1.32	0.41	8.30	7.73	3.11	2.92	10.50	9.94	ns
8 mA	–1	0.47	6.79	0.03	1.10	0.34	6.92	6.44	2.59	2.43	8.75	8.28	ns
12 mA	Std.	0.62	6.34	0.04	1.32	0.41	6.46	5.91	3.37	3.36	8.66	8.11	ns
12 mA	–1	0.52	5.28	0.03	1.10	0.34	5.38	4.92	2.81	2.80	7.22	6.76	ns
16 mA	Std.	0.62	5.92	0.04	1.32	0.41	6.03	5.52	3.42	3.48	8.23	7.72	ns
16 mA	–1	0.52	4.93	0.03	1.10	0.34	5.02	4.60	2.85	2.90	6.86	6.43	ns
24 mA	Std.	0.62	5.55	0.04	1.32	0.41	5.65	5.51	3.50	3.90	7.86	7.71	ns
24 mA	–1	0.52	4.62	0.03	1.10	0.34	4.71	4.59	2.92	3.25	6.55	6.43	ns

Note: For specific junction temperature and voltage supply levels, refer to Table 2-7 for derating values.

Table 2-47. 2.5V LVCMOS High Slew Worst Military-Case Conditions: T_J = 125 °C, Worst-Case VCC = 1.425V, Worst-Case VCCxxxxIOBx = 2.3V Applicable to MSS I/O Banks
Drive  Strength	Speed  Grade	t_DOUT	t_DP	t_DIN	t_PY	t_PYS	t_EOUT	t_ZL	t_ZH	t_LZ	t_HZ	Units
8 mA¹	Std.	0.23	2.52	0.09	1.27	1.49	0.23	2.57	2.34	2.34	2.48	ns
8 mA¹	–1	0.19	2.10	0.08	1.06	1.24	0.19	2.14	1.95	1.95	2.07	ns

Note:

Denotes the software default selection. This note is applicable for the entire row.
For specific junction temperature and voltage supply levels, refer to Table 2-7 for derating values.

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