2.3.4.4.1 Timing Characteristics

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Table 2-57. 1.5V LVCMOS High Slew Worst Military-Case Conditions: T_J = 125 °C, Worst-Case VCC = 1.425V, Worst-Case VCCxxxxIOBx = 1.4V Applicable to FPGA I/O Banks, I/O Assigned to EMC I/O Pins
Drive Strength	Speed Grade	t_DOUT	t_DP	t_DIN	t_PY	t_EOUT	t_ZL	t_ZH	t_LZ	t_HZ	t_ZLS	t_ZHS	Units
2 m	Std.	0.62	8.35	0.04	1.44	0.41	6.89	8.35	3.42	2.77	9.09	10.55	ns
2 m	–1	0.52	6.95	0.03	1.20	0.34	5.74	6.95	2.85	2.31	7.58	8.79	ns
4 mA	Std.	0.62	5.31	0.04	1.44	0.41	4.94	5.31	3.78	3.41	7.15	7.51	ns
4 mA	–1	0.52	4.42	0.03	1.20	0.34	4.12	4.42	3.15	2.85	5.95	6.26	ns
6 mA	Std.	0.62	4.67	0.04	1.44	0.41	4.65	4.67	3.86	3.58	6.85	6.88	ns
6 mA	–1	0.52	3.89	0.03	1.20	0.34	3.87	3.89	3.22	2.98	5.71	5.73	ns
8 mA	Std.	0.62	4.17	0.04	1.44	0.41	4.24	3.58	3.98	4.20	6.45	5.78	ns
8 mA	–1	0.52	3.47	0.03	1.20	0.34	3.54	2.98	3.32	3.50	5.37	4.82	ns
12 mA¹	Std.	0.62	4.17	0.04	1.44	0.41	4.24	3.58	3.98	4.20	6.45	5.78	ns
12 mA¹	–1	0.52	3.47	0.03	1.20	0.34	3.54	2.98	3.32	3.50	5.37	4.82	ns

Note:

Denotes the software default selection. This note is applicable for the entire row.
For specific junction temperature and voltage supply levels, refer to Table 2-7 for derating values.

Table 2-58. 1.5V LVCMOS Low Slew Worst Military-Case Conditions: T_J = 85 °C, Worst-Case VCC = 1.425V, Worst-Case VCCxxxxIOBx = 1.4V Applicable to FPGA I/O Banks, I/O Assigned to EMC I/O Pins
Drive Strength	Speed Grade	t_DOUT	t_DP	t_DIN	t_PY	t_EOUT	t_ZL	t_ZH	t_LZ	t_HZ	t_ZLS	t_ZHS	Units
2 mA	Std.	0.62	12.80	0.04	1.44	0.41	13.04	12.53	3.43	2.65	15.24	14.73	ns
2 mA	–1	0.52	10.67	0.03	1.20	0.34	10.87	10.44	2.86	2.21	12.70	12.28	ns
4 mA	Std.	0.62	10.18	0.04	1.44	0.41	10.37	9.38	3.79	3.28	12.57	11.59	ns
4 mA	–1	0.52	8.48	0.03	1.20	0.34	8.64	7.82	3.16	2.74	10.48	9.66	ns
6 mA	Std.	0.62	9.49	0.04	1.44	0.41	9.67	8.75	3.87	3.45	11.87	10.95	ns
6 mA	–1	0.52	7.91	0.03	1.20	0.34	8.05	7.29	3.22	2.87	9.89	9.13	ns
8 mA	Std.	0.62	9.04	0.04	1.44	0.41	9.21	8.76	3.99	4.05	11.41	10.96	ns
8 mA	–1	0.52	7.53	0.03	1.20	0.34	7.67	7.30	3.33	3.37	9.51	9.13	ns
12 mA	Std.	0.62	9.04	0.04	1.44	0.41	9.21	8.76	3.99	4.05	11.41	10.96	ns
12 mA	–1	0.52	7.53	0.03	1.20	0.34	7.67	7.30	3.33	3.37	9.51	9.13	ns

Note: For specific junction temperature and voltage supply levels, refer to Table 2-7 for derating values.

Table 2-59. 1.5V LVCMOS High Slew Worst Military-Case Conditions: T_J = 85 °C, Worst-Case VCC = 1.4 25V, Worst-Case VCCxxxxIOBx = 1.4V Applicable to MSS I/O Banks
Drive  Strength	Speed  Grade	t_DOUT	t_DP	t_DIN	t_PY	t_PYS	t_EOUT	t_ZL	t_ZH	t_LZ	t_HZ	Units
2 mA¹	Std.	0.23	3.47	0.09	1.37	2.00	0.23	3.53	3.43	2.40	2.37	ns
2 mA¹	–1	0.19	2.89	0.08	1.14	1.66	0.19	2.94	2.86	2.00	1.98	ns

Note:

Denotes the software default selection. This note is applicable for the entire row.
For specific junction temperature and voltage supply levels, refer to Table 2-7 for derating values.

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