23.22.18 PMC Fast Startup Mode Register
This register can only be written if the WPEN bit is cleared in the PMC Write Protection Mode Register.
| Name: | PMC_FSMR |
| Offset: | 0x0070 |
| Reset: | 0x00000000 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| FFLPM | FLPM[1:0] | LPM | USBAL | RTCAL | RTTAL | ||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | ||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| FSTT15 | FSTT14 | FSTT13 | FSTT12 | FSTT11 | FSTT10 | FSTT9 | FSTT8 | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| FSTT7 | FSTT6 | FSTT5 | FSTT4 | FSTT3 | FSTT2 | FSTT1 | FSTT0 | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 23 – FFLPM Force Flash Low-Power Mode
| Value | Description |
|---|---|
| 0 | The Flash Low-Power mode, defined in the FLPM field, is automatically applied when in Wait mode and released when going back to Active mode. |
| 1 | The Flash Low-Power mode is user defined by the FLPM field and immediately applied. |
Bits 22:21 – FLPM[1:0] Flash Low-Power Mode
Note: If Flash is in Standby mode (FLPM = 0) or Deep Power-Down
mode (FLPM = 1), run the wake-up routine from the SRAM. This option provides a slight
improvement in power consumption.
| Value | Name | Description |
|---|---|---|
| 0 | FLASH_STANDBY | Flash is in Standby mode when system enters Wait Mode |
| 1 | FLASH_DEEP_POWERDOWN | Flash is in Deep Power-Down mode when system enters Wait mode |
| 2 | FLASH_IDLE | Idle mode |
Bit 20 – LPM Low-power Mode
| Value | Description |
|---|---|
| 0 | The WaitForInterrupt (WFI) or the WaitForEvent (WFE) instruction of the processor makes the processor enter Sleep mode. |
| 1 | The WaitForEvent (WFE) instruction of the processor makes the system enter Wait mode. |
Bit 18 – USBAL USB Alarm Enable
| Value | Description |
|---|---|
| 0 | The USB alarm has no effect on the PMC. |
| 1 | The USB alarm enables a fast restart signal to the PMC. |
Bit 17 – RTCAL RTC Alarm Enable
| Value | Description |
|---|---|
| 0 | The RTC alarm has no effect on the PMC. |
| 1 | The RTC alarm enables a fast restart signal to the PMC. |
Bit 16 – RTTAL RTT Alarm Enable
| Value | Description |
|---|---|
| 0 | The RTT alarm has no effect on the PMC. |
| 1 | The RTT alarm enables a fast restart signal to the PMC. |
Bits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 – FSTT Fast Startup Input Enable
| Value | Description |
|---|---|
| 0 | The corresponding wake-up input has no effect on the PMC. |
| 1 | The corresponding wake-up input enables a fast restart signal to the PMC. |