Register Source Mode

When the CIC filter is configured for register source mode (INSRC(CICCON1[31])), the filter's input is provided by the user writing data to the CICxDIN register. The input of all enabled channels will be processed when the CICUPDATE(CICCON1[28]) bit is set, regardless of whether the input registers have been written to or not. Writing to the input registers will not trigger any action. While the input sample is being processed, the BUSY bit is set, and CICUPDATE will be cleared by the filter. When processing is done, the BUSY bit is cleared, and the input process complete interrupt is asserted. Upon completion of each input sample, the DECIMCNT(CICSTAT[11:0]) bit will be decremented. It will count down to zero for each input sample processed.

Once the DECIMCNT becomes zero, the processing by the filter is completed, the DONE bit is set, and the output sample ready interrupt is asserted. The DONE (CICSTAT[16]) bit is cleared when the output of all enabled channels is read. If a new output value becomes available before the previous outputs have been read, the overflow interrupt will be triggered, and the CICOUTOVF (CICSTAT[18]) bit will be set. The CICOUTOVF bit can be cleared by software. The output data of channel x is available at CICxDOUT.

The 32-bit CICxACC register acts as the accumulator for the CIC filter, maintaining a cumulative sum of all previous input samples. It does not reset when the DECIMCNT bit becomes zero following output sample generation. CICxACC will be updated with the cumulative sum only when DECIMCNT becomes zero.

Figure 18-11. Register Source Mode
In summary, here are the steps to execute the CIC filter in register source mode:
  1. Write the INSRC(CICCON1[31]) bit to '1'.
  2. Load DECIM(CICDECIM[11:0]) bits with filter length minus one. For example, if the filter length is four, then load DECIM with three.
  3. Set the filter order in ORDER(CICCON1[8]).
  4. If demodulation is required, set the DEMODEN(CICON[29]) bit. If POLSEL(CICCON1[30]) = 0, the demodulation will be based on the value of the POLOVR(CICCON2[0]) bit.
  5. Set the channel enable bits, CH0EN and CH1EN. Turn on the CIC filter, ON(CICCON1[15]).
  6. Verify that the BUSY bit is cleared before writing values to the input register.
  7. Load CICxDIN registers with input samples.
  8. Set the CICUPDATE bit to initiate input sample processing. Upon completion, the CICIPDIF interrupt flag will be set, triggering an interrupt event. The DECIMCNT bit will be loaded with DECIM bits on the first input sample and decrements on subsequent samples.
  9. Once the DECIMCNT bit becomes zero, the CIC filter updates CICxACC with the total sum of input samples. Following this, the DONE bit is set, and the CICOSRIF interrupt flag triggers an interrupt event.
  10. The DONE bit will be cleared once the CICxDOUT register is read. The user can load the input register with new input samples.
  11. Thus, out of four input samples, one output sample is obtained. The input samples have been integrated and decimated.