24.4.4.8.1 Detecting Error Type in the Processed Commands

The ERR_STATUS field in the I3CxRESPQUE register is used to detect the error type in the processed commands. This field indicates errors based on the codes shown in Table 24-15.

Table 24-15. Error Type in the Processed Commands
ERROR_CODE	ERROR_TYPE	ERROR_DESCRIPTION
0x0	NO_ERR	The initiated transfer was successful without any errors.
0x1	CRC_ERR	A CRC error occurred in the HDR-DDR read transfer.
0x2	PARITY_ERR	A parity error occurred in HDR-DDR read transfers.
0x3	Reserved	Reserved
0x4	ADDR_HDR_NACK_ERR	Received NACK for the address header. This indicates no I³C target is present in the system.
0x5	ADDR_NACK_ERR	Received NACK for target address of write/read transfer or Received NACK for assign address of ENTDAA Transfer.
0x6	OVL_URL_ERROR	Experienced Receive FIFO Overflow in HDR Transfers or Experienced Transmit FIFO Underflow in HDR Transfers
0x7	Reserved	Reserved
0x8	ABORT_ERR	The transfer is terminated based on the user-initiated terminate.
0x9	I2C_WR_DATA_NACK_ERR	Received NACK for the I²C Write Data Transfer.
0xC	PEC_ERROR	A PEC byte validation error occurs in read transfers when the TRANSFER_COMMAND[PEC] bit is set to 1.