6.3.5 Dual Core Projects - PIC32CX MT Devices

A dual core device has a Primary (or Main) core and Secondary core that can operate independently and can be programmed and debugged consecutively during application development. Both processor (Primary and Secondary) subsystems have their own interrupt controllers, clock generators, ICD, port logic, I/O MUXes and PPS. The device is equivalent to having two complete devices on a single die.

For more details on PIC32CX 5112/2051/1025 MTC/MTG/MTSH 128/64 dual core devices and how to debug dual core code, search for relevant documentation under 32-bit MCUs and Application Notes.

An example of setting up the Primary and Secondary cores to program and debug is described in the following sections.

Example hardware:

• Target Board: PIC32CXMTSH-DB Evaluation Kit (EV84M21A)
• Debug Tool: MPLAB PICkit 4, MPLAB ICD 4 or MPLAB ICE 4
• Other Tools: ICD 4/PICkit 4 Target Adapter Board (AC102015)

Example software:

• IDE: MPLAB X IDE v6.05 or greater
• Compiler: MPLAB XC32 C compiler v4.21 or greater
• Code: 6.3.5.8 PIC32CXMTSH Example Code