23.6.20 Period Buffer
Note: This register is write-synchronized. The PER Synchronization Busy bit in
the Synchronization Busy register (SYNCBUSY.PER)
must be checked to ensure that synchronization of
the Period Value Buffer (PERBUF) register is
complete. This register must be written with
32-bit accesses only (no 8-bit or 16-bit
writes).
| Name: | PERBUF |
| Offset: | 0x6C |
| Reset: | 0xFFFFFFFF |
| Property: | Write-Synchronized |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| PERBUF[15:8] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PERBUF[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
Bits 15:0 – PERBUF[15:0] Period Buffer Value
This bit field holds the value of the Period Buffer register. The value is copied to the PER
register on an UPDATE condition or when the Update
command is sent to the Control B Set register
(CTRLBSET.CMD = UPDATE).