This register is write-synchronized. The PATT
Synchronization Busy bit in the Synchronization Busy register
(SYNCBUSY.PATT) must be checked to ensure that synchronization of the
Pattern Buffer (PATTBUF) register is complete.
This register must be written with 16-bit accesses only (no 8-bit writes)
Name:
PATTBUF
Offset:
0x64
Reset:
0x0000
Property:
Write-Synchronized
Bit
15
14
13
12
11
10
9
8
PGVB3
PGVB2
PGVB1
PGVB0
Access
R/W
R/W
R/W
R/W
Reset
0
0
0
0
Bit
7
6
5
4
3
2
1
0
PGEB3
PGEB2
PGEB1
PGEB0
Access
R/W
R/W
R/W
R/W
Reset
0
0
0
0
Bits 8, 9, 10, 11 – PGVBn Pattern Generation Output Value Buffer n
These bits serves as the buffer
for the PGV register. If double buffering is used, the valid content of this
register is copied to the PGV register on an UPDATE condition or when the Update
command is sent to the Control B Set register (CTRLBSET.CMD =
UPDATE).
These bits serve as the buffer
of the PGE register. If double buffering is used,the valid content of this register
is copied into the PGE register at an UPDATE condition or when the Update command is
sent to the Control B Set register (CTRLBSET.CMD =
UPDATE).
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
