23.6.15 Pattern
Note: This register is write-synchronized. The PATT Synchronization Busy bit of the Synchronization Busy register (SYNCBUSY.PATT) must be checked to ensure that the PATTERN register synchronization is complete.
| Name: | PATT |
| Offset: | 0x38 |
| Reset: | 0x0000 |
| Property: | Write-Synchronized |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| PGV3 | PGV2 | PGV1 | PGV0 | ||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PGE3 | PGE2 | PGE1 | PGE0 | ||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 |
Bits 8, 9, 10, 11 – PGVn Pattern Generation Output n Value
This register holds the values of pattern for each waveform output.
Bits 0, 1, 2, 3 – PGEn Pattern Generation Output n Enable
This register holds the enable status of the pattern generation for each waveform output.
