14.3.10 DMA Channel x Count Register

Name:	DMAxCNT
Offset:	0x2324, 0x2350, 0x237C, 0x23A8, 0x23D4, 0x2400, 0x242C, 0x2458


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16
	CNT[23:16]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	CNT[15:8]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	CNT[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 23:0 – CNT[23:0] Count bits

The CNT[31:0] bits indicate the number of pending transfers. The count bits are decremented for every completed transfer. The bits are automatically reloaded in Repeated Transfer modes.