15.5.13 SUPC Interrupt Status Register
| Name: | SUPC_ISR |
| Offset: | 0x34 |
| Reset: | 0x00000000 |
| Property: | Read-only |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| VBATSMEV | VDD3V3SMEV | ||||||||
| Access | R | R | |||||||
| Reset | 0 | 0 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| LPDBC4 | LPDBC3 | LPDBC2 | LPDBC1 | LPDBC0 | |||||
| Access | R | R | R | R | R | ||||
| Reset | 0 | 0 | 0 | 0 | 0 |
Bit 17 – VBATSMEV VBAT Supply Monitor Event Interrupt Status (cleared on read)
| Value | Description |
|---|---|
| 0 | No VBAT voltage drop down event has occurred since the last read of SUPC_ISR. |
| 1 | At least one VBAT voltage drop down event has occurred since the last read of SUPC_ISR. |
Bit 16 – VDD3V3SMEV VDD3V3 Supply Monitor Event Interrupt Status (cleared on read)
| Value | Description |
|---|---|
| 0 | No VDD3V3 supply monitor event has occurred since the last read of SUPC_ISR. |
| 1 | At least one VDD3V3 supply monitor event has occurred since the last read of SUPC_ISR. |
Bits 0, 1, 2, 3, 4 – LPDBCx WKUPx Pin Tamper Detection Interrupt Status (cleared on read)
| Value | Description |
|---|---|
| 0 | No tamper detection event has occurred on WKUPx since the last read of SUPC_ISR. |
| 1 | At least one tamper detection event has occurred since the last read of SUPC_ISR. |
