64.7.21 QSPI Pad Calibration Bypass Register
This register can only be written if the WPEN bit is cleared in the QSPI Write Protection Mode Register.
This register is not affected by a software reset (QSPI_CR.SWRST).
Name: | QSPI_PCALBP |
Offset: | 0x60 |
Reset: | 0x00000000 |
Property: | Read/Write |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
CALNBP[3:0] | |||||||||
Access | R/W | R/W | R/W | R/W | |||||
Reset | 0 | 0 | 0 | 0 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
CALPBP[3:0] | |||||||||
Access | R/W | R/W | R/W | R/W | |||||
Reset | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
BPEN | |||||||||
Access | R/W | ||||||||
Reset | 0 |
Bits 19:16 – CALNBP[3:0] Calibration Code Bypass for N-channel
Bits 11:8 – CALPBP[3:0] Calibration Code Bypass for P-channel
Bit 0 – BPEN Bypass Enable
Value | Description |
---|---|
0 | The calibration code is not overridden by values of CALNBP and CALPBP. |
1 | The calibration code is overridden by values of CALNBP and CALPBP. |