64.7.16 QSPI Scrambling Key Register
This register can only be written if the WPEN bit is cleared in the QSPI Write Protection Mode Register.
Name: | QSPI_SKR |
Offset: | 0x44 |
Reset: | – |
Property: | Write-only |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
USRK[31:24] | |||||||||
Access | W | W | W | W | W | W | W | W | |
Reset | – | – | – | – | – | – | – | – |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
USRK[23:16] | |||||||||
Access | W | W | W | W | W | W | W | W | |
Reset | – | – | – | – | – | – | – | – |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
USRK[15:8] | |||||||||
Access | W | W | W | W | W | W | W | W | |
Reset | – | – | – | – | – | – | – | – |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
USRK[7:0] | |||||||||
Access | W | W | W | W | W | W | W | W | |
Reset | – | – | – | – | – | – | – | – |