13.4.8.6 Address and Count Reload

Although the Repeated modes explicitly include it, all the transfer modes allow the automatic reuse of the initial source and destination addresses and transaction counts for multiple operations. Setting the RELOADS (DMAxCH[24]), RELOADD (DMAxCH[25]) and RELOADC (DMAxCH[26]) bits allows the values of DMAxSRC, DMAxDST and DMAxCNT to be restored for the next DMA operation. This causes the registers to be reloaded in One-Shot and Continuous modes after a transfer operation is complete and the channel is re-enabled. Address and transaction count reloading is automatic in Repeated One-Shot and Repeated Continuous modes. DMAxCNT also has its value reloaded after it has been decremented to 0000h, regardless of the setting of the RELOADC or TRMODEx bits. The only exception is if the channel is stopped in mid-operation and restarted later.

Table 13-22 shows the effect of RELOADS/RELOADD/RELOADC on DMAxSRC, DMAxDST and DMAxCNT for the data transfer modes.

Table 13-22. RELOADS/RELOADD/RELOADC Bits and Data Transfer Modes
RELOADS/RELOADD/RELOADC BitsTransfer ModeDMAxSRCDMAxDSTDMAxCNT
1—ReloadedReloadedReloaded
0Repeated One-Shot/ContinuousNot ReloadedNot ReloadedReloaded(1)
0One-Shot/ContinuousNot ReloadedNot ReloadedNot Reloaded
Note:
  1. The reload only happens after DMAxCNT has decremented to ‘0’. No reload occurs if the channel is stopped and later resumed.
  2. The CHEN bit must be enabled for RELOAD to occur. When CHEN = 1, in non-repeated modes (one-shot or continuous), the registers DMAxSRC, DMAxDST and DMATxCNT are reloaded based on their respective reload bits status (RELOADS, RELOADD and RELOADC).