4.4.3.8.1.8 SOTC2A – Start
of Telegram Conditions 2 for Path A
This register is used
only for hardware-controlled automatic telegram reception. It stores the SOTCA settings
that are valid from the wake check OK (RDSIFR.WCOA) to start of telegram OK
(RDSIFR.SOTA). The sequencer state machine copies its content immediately after
RDSIFR.WCOA detection to the SOTCA register.
Note: The bit descriptions are found at the
SOTCA target register.
Name:
SOTC2A
Offset:
0x0F2
Reset:
0x00
Bit
7
6
5
4
3
2
1
0
WCOBOE
RROEA
SFIDEA
WUPEA
MANOEA
SYTOEA
AMPOEA
CAROEA
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
1
1
1
1
1
1
1
1
Bit 7 – WCOBOE
Bit 6 – RROEA
Bit 5 – SFIDEA
Bit 4 – WUPEA
Bit 3 – MANOEA
Bit 2 – SYTOEA
Bit 1 – AMPOEA
Bit 0 – CAROEA
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