44.14 ADC Electrical Specifications

Table 44-15. ADC Single Ended Mode AC Electrical Specifications
AC CHARACTERISTICS			Standard Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +125°C for Extended Temp
Param. No.	Symbol	Characteristics	Min.	Typical	Max.	Units	Conditions
SINGLE ENDED MODE ADC Accuracy
SADC_31a	GERR ⁽¹⁾	Gain Error	-14.00	—	4.00	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA VREF = VDDANA = 5.0V ⁽²⁾
SADC_31b			-18.00	—	7.00	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA VREF = VDDANA = 3.3V⁽²⁾
SADC_31c			-34.00	—	24.00	LSb	1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V VREF = VREFA = 3.0V ⁽³⁾
SADC_31d			-156.0	—	90.0	LSb	1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal VREF = INTREF = 4.096V⁽³⁾
SADC_37a	EOFF ⁽¹⁾	Offset Error	-53	—	58	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA VREF = VDDANA = 5.0V⁽²⁾
SADC_37b			-50	—	62	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA VREF = VDDANA = 3.3V ⁽²⁾
SADC_37c			-53	—	66	LSb	1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V VREF = VREFA = 3.0V ⁽³⁾
SADC_37d			-51	—	62	LSb	1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal VREF = INTREF = 4.096V ⁽³⁾
SADC_43d	TUE ⁽¹⁾	Total Unadjusted Error	3.8	—	91	LSb	1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal VREF = INTREF = 4.096V⁽³⁾
Note: Spec values collected under the following additional conditions: 12 bit resolution mode All registers at reset default value otherwise not mentioned SAMPCTRL.OFFCOMP = 0, SAMPCTRL.SAMPLEN = [5:0] = 3. SAMPCTRL.OFFCOMP = 0 and REFCTRL.REFCOMP = 0 , SAMPCTRL.SAMPLEN = [5:0] = 3.

Table 44-16. Differential Mode ADC Electrical Specifications
AC CHARACTERISTICS			Standard Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +125°C for Extended Temp
Param. No.	Symbol	Characteristics	Min.	Typical	Max.	Units	Conditions
DIFFERENTIAL MODE ADC Accuracy
DADC_11	Res	Resolution	8	—	12	bits	Selectable 8, 10, 12 bit Resolution Ranges
DADC_13a	ENOB^(1,2,3)	Effective Number of bits	10.4	—	—	bits	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA VREF = VDDANA = 5.0V
DADC_13c	ENOB^(1,2,3)	Effective Number of bits	10.3	—	—	bits	1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V VREF = VREFA = 3.0V
DADC_31a	GERR ⁽³⁾	Gain Error	-3.00	—	6.00	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA VREF = VDDANA = 5.0V⁽⁶⁾
DADC_31b			-6.00	—	8.00	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA VREF = VDDANA = 3.3V ⁽⁶⁾
DADC_31c			-27.00	—	30.00	LSb	1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V VREF = VREFA = 3.0V⁽⁷⁾
DADC_31d			-150.0	—	98.0	LSb	1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal VREF = INTREF = 4.096V ⁽⁷⁾
DADC_37a	EOFF ⁽³⁾	Offset Error	-6.0	—	7.0	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA VREF = VDDANA = 5.0V⁽⁶⁾
DADC_37b			-8.0	—	9.0	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA VREF = VDDANA = 3.3V⁽⁶⁾
DADC_37c			-9.0	—	13.0	LSb	1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V VREF = VREFA = 3.0V⁽⁷⁾
DADC_37d			-7.0	—	10.0	LSb	1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal VREF = INTREF = 4.096V ⁽⁷⁾
DIFFERENTIAL MODE ADC Dynamic Performance
DADC_53a	SFDR ^(1,2,3)	Spurious Free Dynamic Range	69	—	—	dB	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA VREF = VDDANA = 5.0V
DADC_53b			70	—	—		1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA VREF = VDDANA = 3.3V
DADC_53c			68	—	—		1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V VREF = VREFA = 3.0V
DADC_53d			68	—	—		1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal VREF = INTREF = 4.096V
Note: Characterized with an analog input sine wave = (FTP(max)/100). For example, FTP(max) = 1Msps/100 = 10 KHz sine wave. Sine wave peak amplitude = 96% ADC_ Full Scale amplitude input with 12bit resolution. Spec values collected under the following additional conditions: 12 bit resolution mode All registers at reset default value otherwise not mentioned ADC functional device operation with either internal or external VREF <2.4v is functional, but not characterized. ADC will function, but with degraded accuracy of approximately ~((0.06 * 2n) /VREF), where "n" = #bits. ADC accuracy is limited by internal VREF accuracy + drift, MCU generated noise plus users application noise/accuracy on VDDANA, GNDANA. Value taken over 7 harmonics. SAMPCTRL.OFFCOMP = 1. SAMPCTRL.OFFCOMP = 1 and REFCTRL.REFCOMP = 1.