44.5 CPU Standby Power

Table 44-6. CPU Standby Current Consumption DC Electrical Specifications
DC CHARACTERISTICS Standard Operating Conditions: VDDIO=VDDANA 2.7V to 5.5V (unless otherwise stated)

Operating temperature: -40°C ≤ TA ≤ +125°C for Extended Temp

Param. No.SymbolCharacteristicsVDDIOxTyp (1)Max.UnitsConditions
SPWR_1IDD_STANDBY (2)CPU IDD in Standby mode XOSC32K running RTC running at 1kHz5.0V15.1585.5µASRAM in Back Bias mode (PM.STDBYCFG.BBIASHS = 0x1), Low-Power regulator used (PM.STDBYCFG.VREGSMODE = 0x2)
SPWR_33.3V13.7574.3µA
SPWR_55.0V60.9650.3µASRAM in Back Bias mode (PM.STDBYCFG.BBIASHS = 0x1), Main Regulator used (PM.STDBYCFG.VREGSMODE = 0x1)
SPWR_73.3V57.2645.1µA
SPWR_95.0V16694.2µASRAM in No Back Bias mode (PM.STDBYCFG.BBIASHS = 0x0), Low-Power regulator used (PM.STDBYCFG.VREGSMODE = 0x2)
SPWR_113.3V14.5681.4µA
SPWR_135.0V61.9765µASRAM in No Back Bias mode (PM.STDBYCFG.BBIASHS = 0x0), Main Regulator used (PM.STDBYCFG.VREGSMODE = 0x1)
SPWR_153.3V58.3759.3µA
SPWR_29CPU IDD in STANDBY mode XOSC32K stopped RTC stopped5.0V13.6580.1µASRAM in Back Bias mode (PM.STDBYCFG.BBIASHS = 0x1), Low- Power regulator used (PM.STDBYCFG.VREGSMODE = 0x2)
SPWR_313.3V12.6569.4µA
SPWR_335.0V59.3642.5µASRAM in Back Bias mode (PM.STDBYCFG.BBIASHS = 0x1), Main Regulator used (PM.STDBYCFG.VREGSMODE = 0x1)
SPWR_353.3V56.2636.5µA
SPWR_375.0V14.4690µASRAM in No Back Bias mode (PM.STDBYCFG.BBIASHS = 0x0), Low- Power regulator used (PM.STDBYCFG.VREGSMODE = 0x2)
SPWR_393.3V13.5677.6µA
SPWR_415.0V60.3760µASRAM in No Back Bias mode (PM.STDBYCFG.BBIASHS = 0x0), Main Regulator used (PM.STDBYCFG.VREGSMODE = 0x1)
SPWR_433.3V57.2754.3µA
Note:
  1. Typical values at 25°C only.
  2. Conditions :
    • System in standby mode
    • No SleepWalking (except RTC when indicated)
    • Peripheral modules are inactive (except RTC when indicated)
    • All clocks stopped (CPU, AHB, APB, Main, GCLK, except RTC running at 1kHz from XOSC32K when indicated)
    • All clock generation sources disabled except XOSC32K running with external 32 kHz crystal when indicated
    • All I/O pins configured as input pins pulled down or tied to GND
    • WDT, CFD Clock Fail Detect disabled
    • BODVDD disabled
    • RESET = VDDIO