47.10.18 USART Channel Status Register (SPI_MODE)
This configuration is relevant only if USART_MODE = 0xE or 0xF in the USART Mode Register.
| Name: | FLEX_US_CSR (SPI_MODE) |
| Offset: | 0x214 |
| Reset: | – |
| Property: | Read-only |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| NSS | CMP | NSSE | |||||||
| Access | R | R | R | ||||||
| Reset | – | – | – |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| UNRE | TXEMPTY | ||||||||
| Access | R | R | |||||||
| Reset | – | – |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| OVRE | TXRDY | RXRDY | |||||||
| Access | R | R | R | ||||||
| Reset | – | – | – |
Bit 23 – NSS Image of NSS Line
| Value | Description |
|---|---|
| 0 | NSS line is driven low (if NSSE = 1, falling edge occurred on NSS line). |
| 1 | NSS line is driven high (if NSSE = 1, rising edge occurred on NSS line). |
Bit 22 – CMP Comparison Match
| Value | Description |
|---|---|
| 0 | No received character matched the comparison criteria programmed in VAL1, VAL2 fields and CMPPAR bit in FLEX_US_CMPR since the last RSTSTA command was issued. |
| 1 | A received character matched the comparison criteria since the last RSTSTA command was issued. |
Bit 19 – NSSE NSS Line (Driving CTS Pin) Rising or Falling Edge Event (cleared on read)
| Value | Description |
|---|---|
| 0 | No NSS line event has been detected since the last read of FLEX_US_CSR. |
| 1 | A rising or falling edge has been detected on the NSS line since the last read of FLEX_US_CSR. |
Bit 10 – UNRE Underrun Error
| Value | Description |
|---|---|
| 0 | No SPI underrun error has occurred since the last RSTSTA command was issued. |
| 1 | At least one SPI underrun error has occurred since the last RSTSTA command was issued. |
Bit 9 – TXEMPTY Transmitter Empty (cleared by writing FLEX_US_THR)
| Value | Description |
|---|---|
| 0 | There are characters in either FLEX_US_THR or the Transmit Shift Register, or the transmitter is disabled. |
| 1 | There are no characters in FLEX_US_THR, nor in the Transmit Shift Register. |
Bit 5 – OVRE Overrun Error
| Value | Description |
|---|---|
| 0 | No overrun error has occurred since the last RSTSTA command was issued. |
| 1 | At least one overrun error has occurred since the last RSTSTA command was issued. |
Bit 1 – TXRDY Transmitter Ready (cleared by writing FLEX_US_THR)
| Value | Description |
|---|---|
| 0 | A character in FLEX_US_THR is waiting to be transferred to the Transmit Shift Register, or the transmitter is disabled. As soon as the transmitter is enabled, TXRDY becomes 1. |
| 1 | There is no character in FLEX_US_THR. |
Bit 0 – RXRDY Receiver Ready (cleared by reading FLEX_US_RHR)
| Value | Description |
|---|---|
| 0 | No complete character has been received since the last read of FLEX_US_RHR or the receiver is disabled. If characters were being received when the receiver was disabled, RXRDY changes to 1 when the receiver is enabled. |
| 1 | At least one complete character has been received and FLEX_US_RHR has not yet been read. |