27.4.6.1.1 Synchronizing Multiple Modules

Each CCP module generates a CCP Sync output signal (see Module Sync Outputs) that can be used to synchronize its operation with other modules. This signal is distinct from the module’s interrupts or any other output signals. All of the CCP modules have access to each others’ Sync signals through the SYNC[4:0] bits; this allows several modules to be chained together for more complex synchronized operations.

A simple example of Synchronized operation is shown in Figure 27-25. In this instance, CCP2 is being synchronized to CCP1. Each module has been configured to use the same clock source for their time bases. In addition, both modules use the CCP Sync signal from CCP1 as their Sync source inputs. CCP1PR now serves as the period register for both CCP1 and CCP2.

Figure 27-26 shows the timing relationship between the two modules. When a match between CCP1TMR and CCP1PR occurs, the Sync signal goes active. This causes the timers in both CCP1 and CCP2 to go to 0000h on the next positive timer input clock edge.

When synchronizing modules, there are two important things to keep in mind:

All synchronized modules are to use the same clock source for their time bases.
When initializing synchronized modules, the module being used as the synchronization source should be enabled last. This ensures that the timers of all synchronized modules are maintained in a Reset condition until the last module is initialized.

Figure 27-25. Example of Two Synchronized Timers (CCP2 Synchronized to CCP1)

Figure 27-26. CCP1 and CCP2 Timers in Sync