17.5.1.3 Six-Step Commutation – PWM Scheme 3

In this PWM scheme, four switches are driven in a given sector. Two pairs of complementary PWM outputs are applied to the two active phases. The inactive phase is overridden low as needed, as shown in Figure 17-42.

Figure 17-42. Six-Step PWM Scheme 3 Waveform

In this scheme, Center-Aligned PWM mode is used with dead time to prevent high current during switching transitions. The two active phases are driven 180 degrees out of phase to one another using the SWAP feature.

Configuration Summary:

  • Center-Aligned PWM mode
  • Complementary Output mode
  • Master Period and Duty Cycle Used
  • Override and SWAP State are Dependent on Sector State
  • Dead time is applied to the Complementary PWM Signal

Six-Step PWM Scheme 3 Code

//For delay function
#define FCY 8000000                     //CPU frequency in Hz
#include "libpic30.h"

void PWMInitialization(void);

unsigned int state = 0;
unsigned int cycleCount = 0;
unsigned int cyclesPerSector = 5;

#define OUTPUTS_ACTIVE 0x000C0000
    //PGxIOCONbits.PMOD = 0b00 -- Complementary output mode
    //PGxIOCONbits.PENH = 1 -- PWM generator x controls PWMxH pin
    //PGxIOCONbits.PENL = 1 -- PWM generator x controls PWMxL pin
    //PGxIOCONbits.OVRENH = 0 -- PWMxH output is not overridden
    //PGxIOCONbits.OVRENL = 0 -- PWMxL output is not overridden
    //PGxIOCONbits.SWAP = 0 -- PWMxH/PWMxL signals are not swapped

#define OUTPUTS_OFF 0x000C3000
    //PGxIOCONbits.PMOD = 0b00 -- Complementary output mode
    //PGxIOCONbits.PENH = 1 -- PWM generator x controls PWMxH pin
    //PGxIOCONbits.PENL = 1 -- PWM generator x controls PWMxL pin
    //PGxIOCONbits.OVRENH = 1 -- PWMxH output is overridden
    //PGxIOCONbits.OVRENL = 1 -- PWMxL output is overridden
    //PGxIOCONbits.OVRDAT = 0b00 --  Override data for PWMxH/L outputs is 0
    //PGxIOCONbits.SWAP = 0 -- PWMxH/PWMxL signals are not swapped

#define OUTPUTS_ACTIVE_SWAPPED 0x000C4000
    //PGxIOCONbits.PMOD = 0b00 -- Complementary output mode
    //PGxIOCONbits.PENH = 1 -- PWM generator x controls PWMxH pin
    //PGxIOCONbits.PENL = 1 -- PWM generator x controls PWMxL pin
    //PGxIOCONbits.OVRENH = 0 -- PWMxH output is not overridden
    //PGxIOCONbits.OVRENL = 0 -- PWMxL output is not overridden
    //PGxIOCONbits.SWAP = 1 -- PWMxH/PWMxL signals are swapped

#define OUTPUTS_OFF_SWAPPED 0x000C7000
    //PGxIOCONbits.PMOD = 0b00 -- Complementary output mode
    //PGxIOCONbits.PENH = 1 -- PWM generator x controls PWMxH pin
    //PGxIOCONbits.PENL = 1 -- PWM generator x controls PWMxL pin
    //PGxIOCONbits.OVRENH = 1 -- PWMxH output is overridden
    //PGxIOCONbits.OVRENL = 1 -- PWMxL output is overridden
    //PGxIOCONbits.OVRDAT = 0b00 --  Override data for PWMxH/L outputs is 0
    //PGxIOCONbits.SWAP = 1 -- PWMxH/PWMxL signals are swapped

unsigned int PWM1State[6] = {OUTPUTS_ACTIVE, OUTPUTS_ACTIVE, OUTPUTS_OFF, OUTPUTS_ACTIVE_SWAPPED, OUTPUTS_ACTIVE_SWAPPED, OUTPUTS_OFF_SWAPPED};
unsigned int PWM2State[6] = {OUTPUTS_ACTIVE_SWAPPED, OUTPUTS_OFF_SWAPPED, OUTPUTS_ACTIVE, OUTPUTS_ACTIVE, OUTPUTS_OFF, OUTPUTS_ACTIVE_SWAPPED};
unsigned int PWM3State[6] = {OUTPUTS_OFF, OUTPUTS_ACTIVE_SWAPPED, OUTPUTS_ACTIVE_SWAPPED, OUTPUTS_OFF_SWAPPED, OUTPUTS_ACTIVE, OUTPUTS_ACTIVE};

//Sector 1:
//PWM1 is operating with outputs active, non-swapped.
//PWM2 is operating with outputs active, swapped.
//PWM3 has outputs overridden off.

//Sector 2:
//PWM1 is operating with outputs active, non-swapped.
//PWM2 has outputs overridden off, swapped.
//PWM3 is operating with outputs active, swapped.

//Sector 3:
//PWM1 has outputs overridden off.
//PWM2 is operating with outputs active, non-swapped.
//PWM3 is operating with outputs active, swapped.

//Sector 4:
//PWM1 is operating with outputs active, swapped.
//PWM2 is operating with outputs active, non-swapped.
//PWM3 has outputs overridden off, swapped.

//Sector 5:
//PWM1 is operating with outputs active, swapped.
//PWM2 has outputs overridden off.
//PWM3 is operating with outputs active, non-swapped.

//Sector 6:
//PWM1 has outputs overridden off, swapped.
//PWM2 is operating with outputs active, swapped.
//PWM3 is operating with outputs active, non-swapped.


int main(void) 
{

    //Initialize PWM Generators 1 - 3
    PWMInitialization();

    //Between setting PGxCONbits.ON = 1 and assigning to MDC, a delay is needed.
    //Otherwise the write will not be successful (duty cycle will remain 0)
    __delay_us(10);
    
    //To Update Duty cycle values to PG1-PG3:
    //1) Write MDC register
    //2) Set update request bit PG1STATbits.UPDREQ.
    //This will transfer MDC value to all the PWM generators PG1-PG3.
    //Note that Update Mode(UPDMOD) of PG2,PG3 is client EOC and PG1CONbits.MSTEN == 1.
    
    //Set master duty cycle to 50%
    MDC = (1000 << 4);
    //Update duty cycle, etc.
    PG1STATbits.UPDREQ = 1;
    
    //Clear variables used in the _PWM1Interrupt()
    state = 0;
    cycleCount = 0;
    
    //Enable PWM Generator 1 Interrupt
    _PWM1IE = 1;
    
    while (1) 
    { 
        
    }
    
}
void PWMInitialization(void)
{
    //Ensuring PWM Generators 1-3 are disabled prior to configuring module
    PG1CONbits.ON = 0;      
    PG2CONbits.ON = 0;
    PG3CONbits.ON = 0;

    //Set PWM master clock to 400MHz from PLL2 through CLKGEN5
    configure_PLL2_Fout_400MHz();
    clock_PWM_from_PLL2_Fout();
    
    //Set PWM frequency to 100kHz given a PWM master clock of 400MHz
    //Note that center-aligned mode uses 2 timer periods per PWM cycle.
    MPER = (2000 << 4); //Time base units are 1/16 of a clock period
    //Master duty cycle initialized as 0
    MDC = 0;
    //No master phase offset
    MPHASE = 0;

    PG1CONbits.CLKSEL = 0b01;   //PWM Generator 1 uses Master PWM clock, undivided and unscaled
    PG1CONbits.MODSEL = 0b100;  //PWM Generator 1 uses Center-Aligned PWM mode (interrupt/register update o