11.2.8 Peripheral Access Control Register 1

Table 11-8. Register Bit Attribute Legend
Symbol	Description	Symbol	Description	Symbol	Description
R	Readable bit	HC	Cleared by Hardware	(Gray cell)	Unimplemented
W	Writable bit	HS	Set by Hardware	X	Bit is unknown at Reset
C	Write to clear	S	Software settable bit	x	Channel number

Name:	PACCON1
Offset:	0x1E80


Bit	31	30	29	28	27	26	25	24
	CM3CONWR	CM2RANGEWR	CM2CONWR	CM1RANGEWR	CM1CONWR	OSCCTRLWR	NVMCONWR	IOIM4CONWR
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	1	1	1	1	1	1	1	1


Bit	23	22	21	20	19	18	17	16
	IOIM3CONWR	IOIM2CONWR	IOIM1CONWR	PCLKCONWR	BMXIRAMHWR	BMXIRAMLWR	IVTCREGWR	IVTBASEWR
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	1	1	1	1	1	1	1	1


Bit	15	14	13	12	11	10	9	8
	CM3CONLK	CM2RANGELK	CM2CONLK	CM1RANGELK	CM1CONLK	OSCCTRLLK	NVMCONLK	IOIM4CONLK
Access	S/R	S/R	S/R	S/R	S/R	S/R	S/R	S/R
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	IOIM3CONLK	IOIM2CONLK	IOIM1CONLK	PCLKCONLK	BMXIRAMHLK	BMXIRAMLLK	IVTCREGLK	IVTBASELK
Access	S/R	S/R	S/R	S/R	S/R	S/R	S/R	S/R
Reset	0	0	0	0	0	0	0	0

Bit 31 – CM3CONWR Clock Monitor 3 Control Register Write Enable bit

Value	Description
1	Register is writable
0	Register is not writable

Bit 30 – CM2RANGEWR Clock Monitor 2 Range (CM2WINPR - CM2LWARN) Write Enable bit

Value	Description
1	Register is writable
0	Register is not writable

Bit 29 – CM2CONWR Clock Monitor 2 Control Register Write Enable bit

Value	Description
1	Register is writable
0	Register is not writable

Bit 28 – CM1RANGEWR Clock Monitor 1 Range (CM1WINPR - CM1LWARN) Write Enable bit

Value	Description
1	Register is writable
0	Register is not writable

Bit 27 – CM1CONWR Clock Monitor 1 Control Register Write Enable bit

Value	Description
1	Register is writable
0	Register is not writable

Bit 26 – OSCCTRLWR System Clock Control Register Write Enable bit

Value	Description
1	Register is writable
0	Register is not writable

Bit 25 – NVMCONWR Nonvolatile Memory Control Register Write Enable bit

Value	Description
1	Register is writable
0	Register is not writable

Bit 24 – IOIM4CONWR IOIM 4 Control Register Write Enable bit

Value	Description
1	Register is writable
0	Register is not writable

Bit 23 – IOIM3CONWR IOIM 3 Control Register Write Enable bit

Value	Description
1	Register is writable
0	Register is not writable

Bit 22 – IOIM2CONWR IOIM 2 Control Register Write Enable bit

Value	Description
1	Register is writable
0	Register is not writable

Bit 21 – IOIM1CONWR IOIM 1 Control Register Write Enable bit

Value	Description
1	Register is writable
0	Register is not writable

Bit 20 – PCLKCONWR PWM Clock Control Register Write Enable bit

Value	Description
1	Register is writable
0	Register is not writable

Bit 19 – BMXIRAMHWR BMX Instruction RAM High Address Register Write Enable bit

Value	Description
1	Register is writable
0	Register is not writable

Bit 18 – BMXIRAMLWR BMX Instruction RAM Low Address Register Write Enable bit

Value	Description
1	Register is writable
0	Register is not writable

Bit 17 – IVTCREGWR Interrupt Vector Collapse Register Write Enable bit

Value	Description
1	Register is writable
0	Register is not writable

Bit 16 – IVTBASEWR Interrupt Vector Base Address Register Write Enable bit

Value	Description
1	Register is writable
0	Register is not writable

Bit 15 – CM3CONLK Clock Monitor 3 Control Register Lock bit

Value	Description
1	Register is write locked
0	Register is not write locked

Bit 14 – CM2RANGELK Clock Monitor 2 Range (CM2WINPR - CM2LWARN) Lock bit

Value	Description
1	Register is write locked
0	Register is not write locked

Bit 13 – CM2CONLK Clock Monitor 2 Control Register Lock bit

Value	Description
1	Register is write locked
0	Register is not write locked

Bit 12 – CM1RANGELK Clock Monitor 1 Range (CM1WINPR - CM1LWARN) Lock bit

Value	Description
1	Register is write locked
0	Register is not write locked

Bit 11 – CM1CONLK Clock Monitor 1 Control Register Lock bit

Value	Description
1	Register is write locked
0	Register is not write locked

Bit 10 – OSCCTRLLK System Clock Control Register Lock bit

Value	Description
1	Register is write locked
0	Register is not write locked

Bit 9 – NVMCONLK Nonvolatile Memory Control Register Lock bit

Value	Description
1	Register is write locked
0	Register is not write locked

Bit 8 – IOIM4CONLK IOIM 4 Control Register Lock bit

Value	Description
1	Register is write locked
0	Register is not write locked

Bit 7 – IOIM3CONLK IOIM 3 Control Register Lock bit

Value	Description
1	Register is write locked
0	Register is not write locked

Bit 6 – IOIM2CONLK IOIM 2 Control Register Lock bit

Value	Description
1	Register is write locked
0	Register is not write locked

Bit 5 – IOIM1CONLK IOIM 1 Control Register Lock bit

Value	Description
1	Register is write locked
0	Register is not write locked

Bit 4 – PCLKCONLK PWM Clock Control Register Lock bit

Value	Description
1	Register is write locked
0	Register is not write locked

Bit 3 – BMXIRAMHLK BMX Instruction RAM High Address Register Lock bit

Value	Description
1	Register is write locked
0	Register is not write locked

Bit 2 – BMXIRAMLLK BMX Instruction RAM Low Address Register Lock bit

Value	Description
1	Register is write locked
0	Register is not write locked

Bit 1 – IVTCREGLK Interrupt Vector Collapse Register Lock bit

Value	Description
1	Register is write locked
0	Register is not write locked

Bit 0 – IVTBASELK Interrupt Vector Base Address Register Lock bit

Value	Description
1	Register is write locked
0	Register is not write locked

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.