11.2.5 Protection Region n Start Address Offset Register

Note:

Register is read-only unless RTYPE[1:0] bits are ‘11’ and LOCK[1:0] bits (PRLOCK[1:0]) are ‘11’. Firmware configurable region descriptors are locked (read-only) at Reset and must be unlocked with a write to PRLOCK before being modified.
Start address offset is a first byte offset from the beginning of the user program Flash (0x800000 address).

Table 11-5. Register Bit Attribute Legend
Symbol	Description	Symbol	Description	Symbol	Description
R	Readable bit	HC	Cleared by Hardware	(Gray cell)	Unimplemented
W	Writable bit	HS	Set by Hardware	X	Bit is unknown at Reset
C	Write to clear	S	Software settable bit	x	Channel number

Name:	PRnST
Offset:	0x304, 0x314, 0x324, 0x334, 0x344, 0x354, 0x364, 0x374


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16
		START[22:16]
Access		R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset		x	x	x	x	0	0	0


Bit	15	14	13	12	11	10	9	8
	START[15:12]				START[11:8]
Access	R/W	R/W	R/W	R/W	R	R	R	R
Reset	x	x	x	x	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	START[7:0]
Access	R	R	R	R	R	R	R	R
Reset	0	0	0	0	0	0	0	0

Bits 22:16 – START[22:16] Most Significant bits of the Protection Region First Byte Address Offset^(1,2)

Bits 15:12 – START[15:12] Most Significant bits of the Protection Region First Byte Address Offset^(1,2)

Bits 11:8 – START[11:8] Least Significant bits of the Protection Region First Byte Address Offset. Fixed value 0x000.

Bits 7:0 – START[7:0] Least Significant bits of the Protection Region First Byte Address Offset. Fixed value 0x000.

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