40.6.32 SQE Test Errors Register

EMAC_STE is an EMAC statistics register. It resets to zero on a read and sticks at all ones when it counts to its maximum value. It should be read frequently enough to prevent loss of data.

Name:	EMAC_STE
Offset:	0x84
Reset:	0x00000000
Property:	Read/Write


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16

Access
Reset


Bit	15	14	13	12	11	10	9	8

Access
Reset


Bit	7	6	5	4	3	2	1	0
	SQER[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 7:0 – SQER[7:0] SQE Test Errors

An 8-bit register counting the number of frames where col was not asserted within 96 bit times (an interframe gap) of tx_en being deasserted in half duplex mode.