50.9.8 CAN Timestamp Register

Name: CAN_TIMESTP
Offset: 0x001C
Reset: 0x00000000
Property: Read-only

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
 MTIMESTAMP[15:8] 
Access RRRRRRRR 
Reset 00000000 
Bit 76543210 
 MTIMESTAMP[7:0] 
Access RRRRRRRR 
Reset 00000000 

Bits 15:0 – MTIMESTAMP[15:0] Timestamp

This field carries the value of the internal CAN controller 16-bit timer value at the start or end of frame.

If CAN_MR.TEOF is cleared, the internal Timer Counter value is captured in the MTIMESTAMP field at each start of frame, else the value is captured at each end of frame. When the value is captured, the TSTP flag is set in CAN_SR. If the TSTP mask in CAN_IMR is set, an interrupt is generated while the TSTP flag is set. The TSTP flag is cleared by reading CAN_SR.

Note: CAN_TIMESTP is reset when the CAN is disabled then enabled via CAN_MR.CANEN.