50.9.3 CAN Interrupt Disable Register
| Name: | CAN_IDR |
| Offset: | 0x0008 |
| Reset: | – |
| Property: | Write-only |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| BERR | FERR | AERR | SERR | CERR | |||||
| Access | W | W | W | W | W | ||||
| Reset | – | – | – | – | – |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| TSTP | TOVF | WAKEUP | SLEEP | BOFF | ERRP | WARN | ERRA | ||
| Access | W | W | W | W | W | W | W | W | |
| Reset | – | – | – | – | – | – | – | – |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| MB15 | MB14 | MB13 | MB12 | MB11 | MB10 | MB9 | MB8 | ||
| Access | W | W | W | W | W | W | W | W | |
| Reset | – | – | – | – | – | – | – | – |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| MB7 | MB6 | MB5 | MB4 | MB3 | MB2 | MB1 | MB0 | ||
| Access | W | W | W | W | W | W | W | W | |
| Reset | – | – | – | – | – | – | – | – |
Bit 28 – BERR Bit Error Interrupt Disable
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Disable Bit Error interrupt. |
Bit 27 – FERR Form Error Interrupt Disable
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Disable Form Error interrupt. |
Bit 26 – AERR Acknowledgment Error Interrupt Disable
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Disable Acknowledgment Error interrupt. |
Bit 25 – SERR Stuffing Error Interrupt Disable
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Disable Stuffing Error interrupt. |
Bit 24 – CERR CRC Error Interrupt Disable
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Disable CRC Error interrupt. |
Bit 23 – TSTP TimeStamp Interrupt Disable
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Disable TSTP interrupt. |
Bit 22 – TOVF Timer Overflow Interrupt
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Disable TOVF interrupt. |
Bit 21 – WAKEUP Wakeup Interrupt Disable
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Disable WAKEUP interrupt. |
Bit 20 – SLEEP Sleep Interrupt Disable
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Disable SLEEP interrupt. |
Bit 19 – BOFF Bus Off Mode Interrupt Disable
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Disable BOFF interrupt. |
Bit 18 – ERRP Error Passive Mode Interrupt Disable
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Disable ERRP interrupt. |
Bit 17 – WARN Warning Limit Interrupt Disable
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Disable WARN interrupt. |
Bit 16 – ERRA Error Active Mode Interrupt Disable
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Disable ERRA interrupt. |
Bits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 – MBx Mailbox x Interrupt Disable
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Disable Mailbox x interrupt. |