29.6.14 Security Control
Important: if BOCOR.SECCFGLOCK =
0 after exiting the Boot ROM:
- The secure boot flash code, before exiting, has the responsibility to lock the NVMCTRL security configurations by clearing the NVMCTRL.SECCTRL.SCFGWEN bit.
- Write accesses (W*) are allowed.
| Name: | SECCTRL |
| Offset: | 0x34 |
| Reset: | x/y initially determined after Reset from NVM User Row (UROW) / BOCOR.SECCFGLOCK |
| Property: | PAC Write-Protection, Secure |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| KEY[7:0] | |||||||||
| Access | W/-/W | W/-/W | W/-/W | W/-/W | W/-/W | W/-/W | W/-/W | W/-/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| TEROW[2:0] | |||||||||
| Access | RW/-/RW | RW/-/RW | RW/-/RW | ||||||
| Reset | 0 | 0 | 0 | ||||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| DXN | DALUN | SCFGWEN | DSCEN | SILACC | TAMPEEN | ||||
| Access | R/-/RW* | -/-/RW* | RW/-/RW* | RW/-/RW | RW/-/RW | RW/-/RW | |||
| Reset | x | y | y | 0 | 0 | 0 |
Bits 31:24 – KEY[7:0] Write Key
When this bit group is written to the key value 0xA5, the write will be performed. If a value different from the key value is tried, the write will be discarded and INTFLAG.KEYE set.
Bits 10:8 – TEROW[2:0] Tamper Erase Row
Bit 6 – DXN Data eXecute Never
Note: This bit field is only available for PIC32CM LS00/LS60 and has no effect for PIC32CM LE00.
This bit status is loaded from UROW during Boot ROM execution.
| Value | Description |
|---|---|
| 0 | Execution out of Data Flash is authorized. |
| 1 | Execution out of Data Flash is not authorized. |
Bit 5 – DALUN DAL Unlock
Note: This bit field is only available for PIC32CM LS00/LS60 and has no effect for PIC32CM LE00.
Writing a '0' to this bit has no effect.
Writing a '1' to this bit will clear the DAL Unlock bit.
After Boot ROM execution:
- DALUN=0 if BOCOR.SECCFGLOCK = 1
- DALUN=1 if BOCOR.SECCFGLOCK = 0
Important: If DALUN=1, the
secure software code of the Flash BOOT region MUST clear this bit before passing
control on to the secure software code of the Flash APPLICATION region.
| Value | Description |
|---|---|
| 0 | DAL is
forced to the DSU STATUSB.DAL value. DAL can only be set to lower values. DALUN cannot be written until the next erase. |
| 1 | DAL is
forced to DAL0. All SDAL commands are allowed. |
Bit 4 – SCFGWEN Security Configuration Write Enable
Note: This bit field is only available for PIC32CM LS00/LS60 and has no effect for PIC32CM LE00.
After Boot ROM execution, this bit is:
- Cleared if BOCOR.SECCFGLOCK = 1
- Set if BOCOR.SECCFGLOCK = 0
Important: If SCFGWEN = 1,
the secure software code of the Flash BOOT region has the responsibility to clear
this bit before passing control on to the secure software code of the Flash
APPLICATION region in order to lock the NVMCTRL security configurations.
| Value | Description |
|---|---|
| 0 | SCFGB, SCFGAD and SECCTRL.SCFGWEN cannot be written until the next reset. |
| 1 | SCFGB, SCFGAD and SECCTRL.SCFGWEN can be written. |
Bit 3 – DSCEN Data Flash Scramble Enable
Note: This bit field is only available for PIC32CM LS00/LS60 and has no effect for PIC32CM LE00.
| Value | Description |
|---|---|
| 0 | Secure Data FLASH is not scrambled. |
| 1 | Secure Data FLASH is scrambled. |
Bit 2 – SILACC Silent Access
| Value | Description |
|---|---|
| 0 | Data in Tamper Erase Row is not mapped as differential data. |
| 1 | Data in Tamper Erase Row is mapped as differential data. |
Bit 0 – TAMPEEN Tamper Erase Enable
| Value | Description |
|---|---|
| 0 | RTC tamper event has no effect. |
| 1 | RTC tamper event triggers a Tamper Erase. |