4.14.3.14 PUF Restrict User Context 0 Write Ones Register

This register can only be written if the WPEN bit is cleared in the Write Protection Mode register.

CAUTION:
  1. This register only allows to write "ones". "Zeros" are forbidden. A chip reset is needed to clear this register.
  2. SFR_PUFRUCRx and SFR_PUFWORUCRx registers are connected to the same input by an OR gate.
Name: SFR_PUFWORUCR0
Offset: 0x214
Reset: 0x00000000
Property: Read/Write

Bit 3130292827262524 
 RESTRICT_USER_CONTEXT_0_WO[31:24] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 2322212019181716 
 RESTRICT_USER_CONTEXT_0_WO[23:16] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 15141312111098 
 RESTRICT_USER_CONTEXT_0_WO[15:8] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 RESTRICT_USER_CONTEXT_0_WO[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 31:0 – RESTRICT_USER_CONTEXT_0_WO[31:0] Value Connected to qk_restrict_user_context_0 input for QK