4.14.3.11 PUF Disable Functions Register

This register can only be written if the WPEN bit is cleared in the Write Protection Mode register.

CAUTION: This register only allows to write ‘ones’ and forbids to write ‘zeros’. A chip reset is needed to clear this register.

The following configuration values are valid for all listed bit names of this register:

0: Operation is permitted.

1: Operation is forbidden.

Name: SFR_PUFDIS
Offset: 0x208
Reset: 0x00000000
Property: Read/Write

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
    RESEEDLAB_TEST_MODETEST_MEMORYRECONSTRUCTWRAP_GENERATED_RANDOM 
Access R/WR/WR/WR/WR/W 
Reset 00000 
Bit 76543210 
 WRAPUNWRAPTEST_PUFSTOPSTARTGET_KEYGENERATE_RANDOMENROLL 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bit 12 – RESEED Connected to qk_disable_reseed input for QK

Bit 11 – LAB_TEST_MODE Connected to qk_disable_lab_test_mode input for QK

Bit 10 – TEST_MEMORY Connected to qk_disable_test_memory input for QK

Bit 9 – RECONSTRUCT Connected to qk_disable_reconstruct input for QK

Bit 8 – WRAP_GENERATED_RANDOM Connected to qk_disable_wrap_generated_random input for QK

Bit 7 – WRAP Connected to qk_disable_wrap input for QK

Bit 6 – UNWRAP Connected to qk_disable_unwrap input for QK

Bit 5 – TEST_PUF Connected to qk_disable_test_puf input for QK

Bit 4 – STOP Connected to qk_disable_stop input for QK

Bit 3 – START Connected to qk_disable_start input for QK

Bit 2 – GET_KEY Connected to qk_disable_get_key input for QK

Bit 1 – GENERATE_RANDOM Connected to qk_disable_generate_random input for QK

Bit 0 – ENROLL Connected to qk_disable_enroll input for QK