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4.14.3.19 Remap Multiport DDR Register Name: SFR_REMAP_MP_DDR Offset: 0x260 Reset: 0x00000000 Property: Read/Write
Bit 31 30 29 28 27 26 25 24 Access Reset
Bit 23 22 21 20 19 18 17 16 Access Reset
Bit 15 14 13 12 11 10 9 8 Host_13 Host_12 Host_11 Host_10 Host_9 Host_8 Access R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0 Host_7 Host_6 Host_5 Host_4 Host_3 Host_2 Host_1 Host_0 Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0
Bits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13 – Host_x Enable DDR Multiport Only for
Host_x
Use instead of
DDR_MP_EN in SFR_CCFG_EBICSA.
On this page
Bits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13 – Host_x Enable DDR Multiport Only for
Host_x
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