42.8.34 Circular Shift Register Configuration
| Name: | CSRCFG |
| Offset: | 0x6C |
| Reset: | 0x00000000 |
| Property: | PAC Write-Protection, Enable-Protected |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| DATA[15:8] | |||||||||
| Access | RW | RW | RW | RW | RW | RW | RW | RW | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| DATA[7:0] | |||||||||
| Access | RW | RW | RW | RW | RW | RW | RW | RW | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SIZE[3:0] | FCS[1:0] | DIR | |||||||
| Access | RW | RW | RW | RW | RW | RW | RW | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | ||
Bits 23:8 – DATA[15:0] Circular Shift Register Value
These bits defines the initial value of circular shift register.
Bits 7:4 – SIZE[3:0] Circular Shift Register Size
These bits defines the size of the circular shift register which is (SIZE+1) bits long.
Bits 2:1 – FCS[1:0] Frame Counter Selection
These bits select the frame counter to use for the circular shift register.
| Value | Name | Description |
|---|---|---|
| 0 | FC0 | Frame Counter 0 |
| 1 | FC1 | Frame Counter 1 |
| 2 | FC2 | Frame Counter 2 |
Bit 0 – DIR Direction
This bit select the shift direction.
| Value | Description |
|---|---|
| 0 | Shifting to the left |
| 1 | Shifitng to the right |