42.8.3 Control C
Name: | CTRLC |
Offset: | 0x06 |
Reset: | 0x0000 |
Property: | PAC Write-Protection |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
LPPM[1:0] | |||||||||
Access | RW | RW | |||||||
Reset | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
CTST[3:0] | ACMEN | ABMEN | LOCK | CLEAR | |||||
Access | RW | RW | RW | RW | RW | RW | RW | RW | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 9:8 – LPPM[1:0] LCD Power Macro Power mode
These bits define the working power mode for the LCD power supply. Refer to the LCD Power Supply section for details.
Value | Name | Description |
---|---|---|
0 | AUTO | LCD power automatically select regulation mode or pump mode |
1 | STEPUP | LCD power use step-up pump loop only |
2 | STEPDOWN | LCD power use step-down drop-out regulation loop only |
Bits 7:4 – CTST[3:0] Contrast Adjustment
These bits adjust the contrast of the LCD panel. There are 16 steps, each step is 60mV. Refer to 42.6.1.9 Contrast Adjustment.
Bit 3 – ACMEN Automated Character Mapping Enable
This bit enables the automated character mapping mode.
Value | Description |
---|---|
0 | Automated character mapping is disabled. |
1 | Automated character mapping is enabled. |
Bit 2 – ABMEN Automated Bit Mapping Enable
This bit enables the automated bit mapping mode.
Value | Description |
---|---|
0 | Automated bit mapping is disabled. |
1 | Automated bit mapping is enabled. |
Bit 1 – LOCK Lock Shadow Memory
This bit allows update of shadow display memory.
Value | Description |
---|---|
0 | Shadow display memory is unlocked. |
1 | Shadow display memory is locked. |
Bit 0 – CLEAR Clear Display Memory
Writing a '1' to this bit clears immediately the display memory.
Writing a '0' to this bit has no effect.