33.7.5 Interrupt Status

Important: For SAM L11 Non-Secure accesses, read accesses (R*) are allowed only if the security attribution for the corresponding channel (CHANNELx) is set as Non-Secured in the NONSECCHAN register.
Name: INTSTATUS
Offset: 0x14
Reset: 0x00000000
Property: Mix-Secure

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
     CHINT3CHINT2CHINT1CHINT0 
Access R/R*/RR/R*/RR/R*/RR/R*/R 
Reset 0000 

Bits 0, 1, 2, 3 – CHINTx Channel x Pending Interrupt

This bit is set when Channel x has a pending interrupt.

This bit is cleared when the corresponding Channel x interrupts are disabled, or the source interrupt sources are cleared.