33.7.14 Interrupt Enable Clear
Important: This register is
only available for SAM
L11 and has
no effect for SAM
L10.
| Name: | INTENCLR |
| Offset: | 0x1D4 |
| Reset: | 0x0 |
| Property: | PAC Write-Protection |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| NSCHK | |||||||||
| Access | RW/RW/RW | ||||||||
| Reset | 0 |
Bit 0 – NSCHK Non-Secure Check Interrupt Enable
Writing '0' to this bit has no effect.
Writing '1' to this bit will clear the Non-Secure Check Interrupt Enable bit, which disables the Non-Secure Check interrupt.
| Value | Description |
|---|---|
| 0 | The Non-Secure Check interrupt is disabled. |
| 1 | The Non-Secure Check interrupt is enabled. |