10.2.3 BOR Controlled by Software

When the BOREN bits of Configuration Word 2 are programmed to ‘01’, the BOR is controlled by the SBOREN bit. The device woke from Sleep is not delayed by the BOR Ready condition or the VDD level only when the SBOREN bit is cleared in software and the device is starting up from a non POR/BOR Reset event.

BOR protection begins as soon as the BOR circuit is ready. The status of the BOR circuit is reflected in the BORRDY bit.

BOR protection is unchanged by Sleep.

Table 10-1. BOR Operating Conditions
BOREN[1:0] SBOREN Device Mode BOR Mode Instruction Execution upon: Release of POR or Wake-up from Sleep
11 X X Active Waits for release of BOR(1) (BORRDY = 1)
10 X Awake Active Waits for release of BOR (BORRDY = 1) Waits for BOR Reset release
Sleep Disabled
01 1 X Active Waits for BOR Reset release (BORRDY = 1)
0 X Disabled Begins immediately (BORRDY = x)
00 X X Disabled
Figure 10-2. Brown-out Situations
Note: TPWRT delay only if the PWRTS bit field is programmed to a value different from ‘11’.