11.13.41 IPR2

Peripheral Interrupt Priority Register 2
Name: IPR2
Offset: 0x364

Bit 76543210 
 DMA1AIPDMA1ORIPDMA1DCNTIPDMA1SCNTIPADCH4IPADCH3IPADCH2IPADCH1IP 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 11110000 

Bit 7 – DMA1AIP DMA1 Abort Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority

Bit 6 – DMA1ORIP DMA1 Overrun Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority

Bit 5 – DMA1DCNTIP DMA1 Destination Count Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority

Bit 4 – DMA1SCNTIP DMA1 Source Count Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority

Bit 3 – ADCH4IP ADC Context 4 Threshold Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority

Bit 2 – ADCH3IP ADC Context 3 Threshold Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority

Bit 1 – ADCH2IP ADC Context 2 Threshold Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority

Bit 0 – ADCH1IP ADC Context 1 Threshold Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority