11.13.42 IPR3
| Name: | IPR3 |
| Offset: | 0x365 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| TMR0IP | CCP1IP | TMR1GIP | TMR1IP | TMR2IP | SPI1IP | SPI1TXIP | SPI1RXIP | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Bit 7 – TMR0IP TMR0 Interrupt Priority
| Value | Description |
|---|---|
| 1 | High Priority |
| 0 | Low Priority |
Bit 6 – CCP1IP CCP1 Interrupt Priority
| Value | Description |
|---|---|
| 1 | High Priority |
| 0 | Low Priority |
Bit 5 – TMR1GIP TMR1 Gate Interrupt Priority
| Value | Description |
|---|---|
| 1 | High Priority |
| 0 | Low Priority |
Bit 4 – TMR1IP TMR1 Interrupt Priority
| Value | Description |
|---|---|
| 1 | High Priority |
| 0 | Low Priority |
Bit 3 – TMR2IP TMR2 Interrupt Priority
| Value | Description |
|---|---|
| 1 | High Priority |
| 0 | Low Priority |
Bit 2 – SPI1IP SPI1 Interrupt Priority
| Value | Description |
|---|---|
| 1 | High Priority |
| 0 | Low Priority |
Bit 1 – SPI1TXIP SPI1 Transmit Interrupt Priority
| Value | Description |
|---|---|
| 1 | High Priority |
| 0 | Low Priority |
Bit 0 – SPI1RXIP SPI1 Receive Interrupt Priority
| Value | Description |
|---|---|
| 1 | High Priority |
| 0 | Low Priority |