11.13.10 PIE3

Peripheral Interrupt Enable Register 3
Name: PIE3
Offset: 0x4A1

Bit 76543210 
 TMR0IECCP1IETMR1GIETMR1IETMR2IESPI1IESPI1TXIESPI1RXIE 
Access R/WR/WR/WR/WR/WR/WR/WR 
Reset 00000000 

Bit 7 – TMR0IE TMR0 Interrupt Enable

ValueDescription
1 Enabled
0 Disabled

Bit 6 – CCP1IE CCP1 Interrupt Enable

ValueDescription
1 Enabled
0 Disabled

Bit 5 – TMR1GIE TMR1 Gate Interrupt Enable

ValueDescription
1 Enabled
0 Disabled

Bit 4 – TMR1IE TMR1 Interrupt Enable

ValueDescription
1 Enabled
0 Disabled

Bit 3 – TMR2IE TMR2 Interrupt Enable

ValueDescription
1 Enabled
0 Disabled

Bit 2 – SPI1IE SPI1 Interrupt Enable

ValueDescription
1 Enabled
0 Disabled

Bit 1 – SPI1TXIE SPI1 Transmit Interrupt Enable

ValueDescription
1 Enabled
0 Disabled

Bit 0 – SPI1RXIE SPI1 Receive Interrupt Enable

ValueDescription
1 Enabled
0 Disabled