11.13.51 IPR12
| Name: | IPR12 |
| Offset: | 0x36E |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| DMA5AIP | DMA5ORIP | DMA5DCNTIP | DMA5SCNTIP | U4IP | U4EIP | U4TXIP | U4RXIP | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Bit 7 – DMA5AIP DMA5 Abort Interrupt Priority
| Value | Description |
|---|---|
| 1 | High Priority |
| 0 | Low Priority |
Bit 6 – DMA5ORIP DMA5 Overrun Interrupt Priority
| Value | Description |
|---|---|
| 1 | High Priority |
| 0 | Low Priority |
Bit 5 – DMA5DCNTIP DMA5 Destination Count Interrupt Priority
| Value | Description |
|---|---|
| 1 | High Priority |
| 0 | Low Priority |
Bit 4 – DMA5SCNTIP DMA5 Source Count Interrupt Priority
| Value | Description |
|---|---|
| 1 | High Priority |
| 0 | Low Priority |
Bit 3 – U4IP UART 4 Interrupt Priority
| Value | Description |
|---|---|
| 1 | High Priority |
| 0 | Low Priority |
Bit 2 – U4EIP UART4 Framing Error Interrupt Priority
| Value | Description |
|---|---|
| 1 | High Priority |
| 0 | Low Priority |
Bit 1 – U4TXIP UART4 Transmit Interrupt Priority
| Value | Description |
|---|---|
| 1 | High Priority |
| 0 | Low Priority |
Bit 0 – U4RXIP UART4 Receive Interrupt Priority
| Value | Description |
|---|---|
| 1 | High Priority |
| 0 | Low Priority |