11.13.37 PIR14
Note:
- Interrupt flag bits get set when an interrupt condition occurs, regardless of the state of its corresponding enable bit or the global enable bit. User software needs to ensure the appropriate interrupt flag bits are clear prior to enabling an interrupt.
Name: | PIR14 |
Offset: | 0x4BC |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
DMA7AIF | DMA7ORIF | DMA7DCNTIF | DMA7SCNTIF | NCO3IF | CM2IF | CLC7IF | |||
Access | R/W | R/W | R/W | R/W | R/W/HS | R/W/HS | R/W/HS | ||
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 7 – DMA7AIF DMA7 Abort Interrupt Flag
Value | Description |
---|---|
1 | Interrupt has occurred (must be cleared by software) |
0 | Interrupt event has not occurred |
Bit 6 – DMA7ORIF DMA7 Overrun Interrupt Flag
Value | Description |
---|---|
1 | Interrupt has occurred (must be cleared by software) |
0 | Interrupt event has not occurred |
Bit 5 – DMA7DCNTIF DMA7 Destination Count Interrupt Flag
Value | Description |
---|---|
1 | Interrupt has occurred (must be cleared by software) |
0 | Interrupt event has not occurred |
Bit 4 – DMA7SCNTIF DMA7 Source Count Interrupt Flag
Value | Description |
---|---|
1 | Interrupt has occurred (must be cleared by software) |
0 | Interrupt event has not occurred |
Bit 3 – NCO3IF NCO3 Interrupt Flag
Value | Description |
---|---|
1 | Interrupt has occurred (must be cleared by software) |
0 | Interrupt event has not occurred |
Bit 2 – CM2IF CMP2 Interrupt Flag
Value | Description |
---|---|
1 | Interrupt has occurred (must be cleared by software) |
0 | Interrupt event has not occurred |
Bit 1 – CLC7IF CLC7 Interrupt Flag
Value | Description |
---|---|
1 | Interrupt has occurred (must be cleared by software) |
0 | Interrupt event has not occurred |