13.23.9 Using Design Block Cores from the Catalog - HDL Entry

Use cores to:

• Create high-level modules, such as counters, multiplexers, multipliers, etc. that are optimized for Microchip FPGAs.
• Create system-level building blocks, such as filters, FIFOs, and memories.

These can be instantiated into your schematic, Verilog design, or HDL design.

To use Design Blocks with your HDL design:

1. From the Libero IDE File menu, choose New.
2. In the New File dialog box, select the core, type a name, and click OK. The core configurator opens.
3. Select your core type. The appropriate options appear. Select a tab and fill in the fields. Click Generate.
4. In the Save As dialog box, leave the default selections and click Save. The file is added to your Libero IDE project; it is shown in the Hierarchy tab.
5. Instantiate the module in your HDL design.