5.30.32 CCC Configuration report
The Fusion Dynamic CCC (DYNCCC) and ProASIC3E Dynamic CCC prints out all the values of the configuration pins in a report. You can use these to specify the bitstream that can be shifted in via the shift register.
To view the CCC Configuration report, from the Tools menu, choose Reports > Global > CCC_configuration.
The CCC Configuration report for Fusion has some signal names that do not appear in the ProASIC3E report. A sample Fusion DYNCCC report is shown below:
******************************************************************** Dynamic Stream Data
********************************************************************
Product: Designer Release: 7.2
Version: 7.2.0.13
Date : Thu Apr 13 14:48:21 2006
Design Name: AFS600_dynpll_rc_a100_ybycout Family: Fusion Die: AFS600 Package: Fully Bonded Package
Location: MIDDLE_LEFT
Instance: Core DEF Name: DYNCCC Core/U_P0 (1,40)
Core/U_PLL | (2,40) | ||
Core/U_GLB | (1,41) | ||
Core/U_GLC | (2,41) | ||
Core/U_P4 | (1,42) | ||
NAME | SDIN | VALUE | TYPE |
FINDIV | [ 6: 0] | 0010011 | EDIT |
FBDIV | [13: 7] | 0001011 | EDIT |
OADIV | [18:14] | 00011 | EDIT |
OBDIV | [23:19] | 00001 | EDIT |
OCDIV | [28:24] | 00000 | EDIT |
OAMUX | [31:29] | 101 | EDIT |
OBMUX | [34:32] | 111 | EDIT |
OCMUX | [37:35] | 110 | EDIT |
FBSEL | [39:38] | 10 | EDIT |
FBDLY | [44:40] | 10100 | EDIT |
XDLYSEL | [45] | 1 | EDIT |
DLYGLA | [50:46] | 01001 | EDIT |
DLYGLB | [55:51] | 00000 | EDIT |
DLYGLC | [60:56] | 00000 | EDIT |
DLYYB | [65:61] | 10001 | EDIT |
DLYYC | [70:66] | 11100 | EDIT |
STATASEL | [71] | 1 | MASKED |
STATBSEL | [72] | 1 | MASKED |
STATCSEL | [73] | 1 | MASKED |
VCOSEL | [76:74] | 010 | EDIT |
DYNASEL | [77] | 0 | MASKED |
DYNBSEL | [78] | 1 | MASKED |
DYNCSEL | [79] | 1 | MASKED |
RESETEN | [80] | 1 | READONLY |
RXASEL | [81] | 0 | MASKED |
RXBSEL | [82] | 0 | MASKED |
RXCSEL | [83] | 0 | MASKED |
OADIVHALF | [84] | 0 | EDIT |
OBDIVHALF | [85] | 0 | EDIT |
OCDIVHALF | [86] | 0 | EDIT |
GLMUXCFG | [88:87] | 00 | MASKED |
A sample ProASIC3E DYNCCC report is shown below.
******************************************************************** Dynamic Stream Data
********************************************************************
Product: Designer Release: 7.2
Version: 7.2.0.0
Date : Tue May 02 15:50:01 2006
Design Name: dynccc Family: ProASIC3E Die: A3PE600 Package: Fully Bonded Package Location: MIDDLE_RIGHT
Instance: I_dynccc I_dynccc/U_DYN | (196,40) | DEF Name: DYNCCC | ||
I_dynccc/U_PLL | (195,40) | |||
I_dynccc/U_GLB | (196,41) | |||
I_dynccc/U_GLC | (195,41) | |||
NAME | SDIN | VALUE | TYPE | |
FINDIV | [ 6: 0] | 1100101 | EDIT | |
FBDIV | [13: 7] | 0000110 | EDIT | |
OADIV | [18:14] | 00101 | EDIT | |
OBDIV | [23:19] | 00101 | EDIT | |
OCDIV | [28:24] | 00101 | EDIT | |
OAMUX | [31:29] | 101 | EDIT |
OBMUX | [34:32] | 101 | EDIT |
OCMUX | [37:35] | 101 | EDIT |
FBSEL | [39:38] | 00 | EDIT |
FBDLY | [44:40] | 00110 | EDIT |
XDLYSEL | [45] | 0 | EDIT |
DLYGLA | [50:46] | 00101 | EDIT |
DLYGLB | [55:51] | 10001 | EDIT |
DLYGLC | [60:56] | 10001 | EDIT |
DLYYB | [65:61] | 00101 | EDIT |
DLYYC | [70:66] | 00101 | EDIT |
STATASEL | [71] | 1 | MASKED |
STATBSEL | [72] | 1 | MASKED |
STATCSEL | [73] | 1 | MASKED |
VCOSEL | [76:74] | 000 | EDIT |
DYNASEL | [77] | 0 | MASKED |
DYNBSEL | [78] | 0 | MASKED |
DYNCSEL | [79] | 0 | MASKED |
RESETEN | [80] | 1 | READONLY |
