1.3.12 Sequencing in Fusion
The ADC has a strobe signal per temperature or current channel that must be asserted to initiate the conversion process. This strobe signal has strict timing pulse-width requirements; the strobe signal must stay on and then off for certain periods of time.
The requirement is that a strobe signal must stay low for a minimum of 5 s after a high-to-low transition. Also, there is a high time requirement:
- 5 s high for current strobe
- 10 s high for temperature strobe
For temperature channels, the sample sequencer automatically inserts a 5 s delay before the ADC is started. During this time the strobe signal for that particular channel is asserted. This is to ensure that the temperature monitor block inside the ADC has settled to the correct value. After this 5 s has elapsed, the ADC sampling occurs. The length of this sampling period is the acquisition time specified in the peripheral configuration dialog.
After the sampling period is completed, then ADC conversion begins.
Because of the automatic insertion of the 5s delay, the minimum acquisition time for temperature is only required to be 5s. Using the minimum acquisition time + the 5s delay satisfies the minimum strobe requirement for temperature monitoring, as shown in the figure below.
The ASSC generates these strobe signals; it has no concept of elapsed time, past samples, or future samples. A strobe pulse is activated for the entire ASSC processing time for a particular channel, and deactivated as soon as it moves to another channel. Thus, this requirement must be accounted for by you and/or ASB during the sequencing.
You must satisfy the following conditions to meet the requirement:
- A channel that requires a strobe cannot be sampled again until 5s has elapsed
- A channel that requires a strobe must have a conversion time + ASSC processing time >= 5s
The second condition is automatically handled because you enter a MINIMUM required sampling time. ASB can then ensure a minimum 5 s conversion time for temperature and current channels by adjusting the STC and ADC clock periods.
