16.1.7 Position 1 Counter Hold Register Low

Name:	POS1HLDL
Offset:	0x150


Bit	15	14	13	12	11	10	9	8
	POSHLD[15:8]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	POSHLD[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 15:0 – POSHLD[15:0] Hold Register for Reading/Writing Position 1 Counter Register (POS1CNTH) bits

DS70005628A

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