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46.5.6 Level D
Table 46-7. Register Bit Attribute Legend Symbol Description Symbol Description Symbol Description R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented W Writable bit HS Set by Hardware X Bit is unknown at Reset K Write to clear S Software settable bit — —
Name: LEVELD Offset: 0x20C Reset: 0x00000000 Property: R
The LEVELx registers
are read-only registers containing the current level (from 0 to 7) for the 32 tamper
sources.
Bit 31 30 29 28 27 26 25 24 Level 31[3:0] Level 30[3:0] Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16 Level 29[3:0] Level 28[3:0] Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 Level 27[3:0] Level 26[3:0] Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0 Level 25[3:0] Level 24[3:0] Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bits 31:28 – Level 31[3:0] Sets level for Tamper source 31
Bits 27:24 – Level 30[3:0] Sets level for Tamper source 30
Bits 23:20 – Level 29[3:0] Sets level for Tamper source 29
Bits 19:16 – Level 28[3:0] Sets level for Tamper source 28
Bits 15:12 – Level 27[3:0] Sets level for Tamper source 27
Bits 11:8 – Level 26[3:0] Sets level for Tamper source 26
Bits 7:4 – Level 25[3:0] Sets level for Tamper source 25
Bits 3:0 – Level 24[3:0] Sets level for Tamper source 24
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